Computer Organization & Architecture: CPU, Memory, Buses & System Design

TAKEAWAYS:

• CPU is the brain: It fetches, decodes, executes, and stores results in a cycle called the instruction cycle, with ALU (arithmetic/logic) and CU (control unit) as its core components.
• Memory hierarchy: Primary memory (RAM/ROM) is fast but volatile; secondary memory (HDD/SSD) is slow but persistent—computers use both for efficiency.
• Buses are highways: Data, address, and control buses connect CPU, memory, and I/O devices, enabling communication via handshaking protocols.
• CISC vs. RISC: Complex Instruction Set (CISC) uses fewer instructions for complex tasks (e.g., Intel x86), while Reduced Instruction Set (RISC) uses simpler, faster instructions (e.g., ARM in smartphones).
• Real-world impact: From eSewa’s transaction validation (CPU + RAM speed) to Daraz’s order processing (networked servers + storage), architecture dictates performance.
• Exam focus: Compare memory types, explain CPU cycles, differentiate CISC/RISC, and justify network topologies for given scenarios (e.g., NTC’s nationwide fiber-optic backbone).

1. Computer System Organization: The Big Picture

A computer system is a hierarchical assembly of hardware components that work together to process data. At the highest level, it consists of:

1. Input/Output (I/O) devices (keyboard, monitor, printer).
2. Central Processing Unit (CPU) – the "brain" that executes instructions.
3. Memory – stores data and programs (primary and secondary).
4. System buses – pathways for data/control signals between components.

Why this matters: The CPU cannot work alone—it relies on memory to store instructions and I/O devices to interact with users. The buses act as "highways" connecting these components.

2. The Central Processing Unit (CPU): How It Works

The CPU is divided into two main parts:

• Arithmetic Logic Unit (ALU): Performs arithmetic (addition, subtraction) and logical operations (AND, OR, NOT).
• Control Unit (CU): Manages instruction execution by coordinating data flow between CPU, memory, and I/O.

The Instruction Cycle

The CPU follows a 4-step cycle to execute a program:

1. Fetch: Retrieves the next instruction from memory (using the program counter).
2. Decode: Interprets the instruction (e.g., "add two numbers").
3. Execute: Performs the operation (ALU does the math).
4. Store: Writes the result back to memory or a register.

sequenceDiagram
    participant CPU as CPU (CU + ALU)
    participant RAM as Memory
    CPU->>RAM: Fetch (PC → MAR)
    RAM-->>CPU: Instruction (MDR)
    CPU->>CPU: Decode
    CPU->>CPU: Execute (ALU)
    CPU->>RAM: Store (MDR → MAR)
    Note over CPU,RAM: PC increments after each cycle

Worked Example: Adding Two Numbers Suppose we add 5 + 3 stored in memory locations 0x1000 and 0x1001:

1. Fetch: CPU loads instruction ADD 0x1000, 0x1001 from memory.
2. Decode: CU recognizes it as an addition operation.
3. Execute: ALU reads 5 (from 0x1000) and 3 (from 0x1001), computes 8.
4. Store: Result 8 is written to 0x1002.

3. Memory Hierarchy: Primary vs. Secondary Memory

Memory is organized in a hierarchy based on speed, cost, and capacity. The closer to the CPU, the faster but more expensive.

Types of Primary Memory

1. RAM (Random Access Memory):

   • Volatile, used for temporary storage (e.g., running programs).
   • Types:
     • DRAM (Dynamic RAM): Slower, needs refreshing (used in PCs).
     • SRAM (Static RAM): Faster, used in CPU cache.
   • IMAGE: RAM chip labelled diagram | Shows DRAM/SRAM cells with capacitors/transistors.

2. ROM (Read-Only Memory):

   • Non-volatile, stores firmware (e.g., BIOS in PCs).
   • Types:
     • PROM: Programmable once.
     • EPROM/EEPROM: Erasable and reusable.

Types of Secondary Memory

1. HDD (Hard Disk Drive):

   • Uses magnetic platters and a moving read/write head.
   • Slower but cheaper (e.g., old laptops).
   • IMAGE: HDD internal structure labelled diagram | Shows platters, actuator arm, and spindle motor.

2. SSD (Solid State Drive):

   • Uses flash memory (no moving parts).
   • Faster, more durable (e.g., modern laptops, phones).
   • IMAGE: SSD vs. HDD comparison labelled diagram | Highlights NAND flash chips vs. magnetic platters.

3. Optical Storage (CD/DVD):

   • Uses laser to read/write data (e.g., software installation discs).

Why We Need Both:

• Primary memory is too small for long-term storage (e.g., a 4GB RAM cannot hold all your files).
• Secondary memory is too slow for active processing (e.g., loading an OS from HDD takes seconds).

4. System Buses: The Communication Backbone

Buses are parallel wires that connect CPU, memory, and I/O devices. There are three types:

How Buses Work:

1. CPU sends an address (via address bus) to memory.
2. Memory responds with data (via data bus).
3. Control bus signals whether to read or write.

5. CPU Architectures: CISC vs. RISC

CPUs are designed with different instruction set architectures (ISA). The two main types:

Why RISC is Used in Mobiles:

• ARM processors (RISC) are power-efficient, critical for battery life in smartphones.
• Example: Pathao’s driver app runs on ARM-based Android phones, using RISC’s simplicity to save energy.

6. Real-World Applications in Nepal

1. eSewa’s Transaction Processing (CPU + Memory)

• How it uses architecture:
  • CPU: Validates transactions (e.g., ADD balance, SUB amount) in microseconds.
  • RAM: Stores temporary transaction data (volatile but fast).
  • SSD: Logs transactions permanently (non-volatile).
• Why it matters: If the CPU were slow (e.g., CISC with many cycles), transactions would lag during peak hours (e.g., Dashain).

2. Ncell’s Network Infrastructure (Buses + I/O)

• How it uses architecture:
  • Data buses transmit user calls/data between cell towers and servers.
  • Control buses manage handshaking (e.g., "Is the line free?").
  • SSDs store customer records (faster than HDDs for quick lookups).
• Example: When you call a Daraz customer care, the signal travels via buses to a server, which fetches your order history from SSD.

3. Daraz’s Order Queue (Memory Hierarchy)

• Problem: During sales (e.g., 11.11), thousands of orders flood the system.
• Solution:
  • RAM: Holds active orders (fast access for processing).
  • SSD: Stores completed orders (persistent storage).
  • HDD: Archives old orders (cheap, slow).
• IMAGE: Daraz order processing flowchart | Shows RAM → SSD → HDD with arrows for order flow.

7. Exam Tip: How to Score Full Marks

1. Compare memory types: Always use a table (as above) and mention speed vs. cost trade-offs.
2. CPU cycle explanation: Draw a sequence diagram (like the one above) or list the 4 steps with examples.
3. CISC vs. RISC: Use a comparison table and link to real devices (e.g., "Intel in desktops vs. ARM in smartphones").
4. Network scenarios: For questions like "Design a network for 30 computers in a building," justify your choice:
   • Star topology (central switch) for Ncell’s cell towers (easy fault isolation).
   • Bus topology for a small office (cheaper, but single-point failure risk).
5. Worked examples: Always tie to Nepalese tech (e.g., "eSewa uses RISC CPUs for fast transactions").
6. Diagrams: Label every component in figures (e.g., "This is the ALU," "This is the data bus").

8. Common Pitfalls to Avoid

• Mixing analog/digital: Analog computers (e.g., old temperature gauges) use continuous signals; digital (PCs) use discrete bits.
• Memory confusion: RAM is volatile; ROM is non-volatile but unchangeable (except EEPROM).
• Bus directions: Address bus is unidirectional (CPU → Memory), while data bus is bidirectional.
• CISC/RISC: Don’t say RISC is "slower"—it’s faster per instruction but may need more instructions for complex tasks.

9. Practice Questions (Based on Past Exams)

1. Compare primary and secondary memory using a table, and explain why a computer needs both.
2. Trace the instruction cycle for the operation SUB 0x2000, 0x2001 (store result in 0x2002).
3. Design a network for a 2-story building with 15 computers per floor. Justify your topology choice.
4. Differentiate CISC and RISC, and give one Nepalese example of each in use.
5. How does an SSD differ from an HDD? Why would Ncell prefer SSDs for their servers?

10. Quick Revision Checklist

• Can you draw the CPU’s internal components (ALU, CU, registers)?
• Do you know the 4 steps of the instruction cycle?
• Can you list 3 primary and 3 secondary memory types with examples?
• What’s the difference between data, address, and control buses?
• Which architecture (CISC/RISC) is used in smartphones, and why?
• How does eSewa use memory hierarchy during peak transactions?