Fault Detection & IC Manufacturing: Testing, Defects & Fabrication

TAKEAWAYS:

• Fault detection uses parity bits, Hamming codes, and redundancy to correct errors in data transmission (e.g., WhatsApp message integrity).
• IC manufacturing follows 5 key steps: wafer preparation, oxidation, photolithography, doping, and metallization (used in Ncell SIM cards).
• Parity bits detect single-bit errors but cannot correct them (e.g., Daraz order checksums).
• Hamming codes enable single-bit error correction by adding redundant bits (e.g., NEPSE stock data validation).
• Redundancy (triple modular redundancy) ensures fault tolerance in critical systems (e.g., aircraft control systems).
• Testing includes stuck-at faults, short circuits, and open circuits, detected via logic analyzers or automated test equipment (ATE).

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1. Fault Detection in Digital Systems

Faults in digital circuits arise from hardware defects, noise, or aging. Detection methods include:

• Parity bits: Simple error detection using an extra bit (even/odd parity).
• Hamming codes: Advanced error correction with redundant bits.
• Redundancy techniques: Duplicate or triplicate circuits to mask faults.

1.1 Parity Bit for Error Detection

A parity bit is added to a binary word to detect single-bit errors.

• Even parity: Sum of bits (including parity) is even.
• Odd parity: Sum of bits (including parity) is odd.

Example: Detect an error in the word 10110 (even parity).

1. Count 1s: 3 (odd).
2. Add parity bit 1 → 110110 (even).
3. If received as 110100, parity fails → error detected.

Real-world use:

• WhatsApp messages: Uses checksums (parity-like) to detect corrupted data during transmission.
• eSewa transactions: Parity checks ensure payment details (e.g., account number) are error-free.

1.2 Hamming Codes for Error Correction

Hamming codes add redundant bits to correct single-bit errors.

• Formula: For n data bits, use r = ⌈log₂(n + r + 1)⌉ parity bits.
• Steps:
  1. Assign parity bits to positions that are powers of 2 (e.g., 1, 2, 4, 8).
  2. Calculate parity for each bit position covered by the parity bit.
  3. If an error occurs, the parity bits form a binary number indicating the faulty bit.

Example: Encode 1011 (4 bits) with Hamming code.

1. Need r = 3 parity bits → 7-bit code.
2. Assign parity bits to positions 1, 2, 4.
3. Calculate:
   • P₁ (covers 1,3,5,7): 1 ⊕ 1 ⊕ 0 ⊕ 0 = 0
   • P₂ (covers 2,3,6,7): 0 ⊕ 1 ⊕ 0 ⊕ 0 = 1
   • P₄ (covers 4,5,6,7): 1 ⊕ 0 ⊕ 0 ⊕ 0 = 1
4. Final code: P₄ P₂ P₁ D₁ D₂ D₃ D₄ = 1 1 0 1 0 1 1

Error correction:

• Received word: 1101101 (error in D₃).
• Calculate syndrome:
  • P₁: 1 ⊕ 0 ⊕ 1 ⊕ 1 = 1
  • P₂: 1 ⊕ 0 ⊕ 0 ⊕ 1 = 0
  • P₄: 1 ⊕ 1 ⊕ 0 ⊕ 1 = 1
• Syndrome 101 (binary 5) → D₃ is faulty. Correct to 1.

Real-world use:

• NEPSE stock data: Hamming codes ensure stock prices (e.g., 1011) are transmitted without errors.
• Bank transactions (e.g., Nabil Bank ATMs): Use error-correcting codes to validate card swipes.

1.3 Redundancy Techniques

• Triple Modular Redundancy (TMR): Three identical circuits vote on output.
  • If two outputs match, the third is faulty.
• N-Modular Redundancy (NMR): Generalized for N circuits.
• Spare circuits: Standby circuits activate if primary fails.

Example: TMR in a traffic light controller (Kathmandu traffic).

• Three identical controllers run in parallel.
• If one fails (due to power surge), the other two override it.

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2. IC Manufacturing Basics

Integrated Circuits (ICs) are fabricated in semiconductor foundries (e.g., Intel, TSMC). Key steps:

2.1 Wafer Preparation

• Silicon ingot is grown via Czochralski process.
• Sliced into wafers (thin circular disks).
• Polished to atomic smoothness.

2.2 Oxidation

• Wafers are heated in oxygen to grow a SiO₂ (silicon dioxide) layer.
• Acts as an insulator for gates.

2.3 Photolithography

• Pattern transfer using light and photoresist.
• Steps:
  1. Coat wafer with photoresist.
  2. Expose to UV light through a mask (contains circuit pattern).
  3. Develop: exposed resist washes away, leaving the pattern.

UV light exposes photoresist through a mask (Image: Cmglee, CC BY-SA 3.0, via Wikimedia Commons)

2.4 Doping

• Impurities (boron, phosphorus) are added to silicon to create p-type or n-type regions.
• Forms PN junctions (diodes, transistors).

Example: Creating an NMOS transistor:

1. Start with p-type silicon.
2. Doping with phosphorus creates an n-type source/drain.
3. Gate oxide is grown, and a polysilicon gate is deposited.

2.5 Metallization

• Aluminum/copper layers are deposited to connect transistors.
• Forms interconnects (wires) between components.

2.6 Testing and Packaging

• Probing: Test each die on the wafer.
• Packaging: Dies are cut, mounted on a lead frame, and encapsulated in plastic.

Real-world use:

• Ncell SIM cards: Contain ICs manufactured via these steps for signal processing.
• Intel/AMD CPUs: Fabricated in foundries using 7nm or smaller processes.

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3. Fault Detection in ICs

Faults in ICs include:

Example: Testing a 74LS00 NAND gate IC.

1. Apply inputs A=0, B=0 → Expected output 1.
2. If output is 0, the gate is stuck-at-0.
3. Repeat for all input combinations.

Real-world use:

• Pathao driver apps: Use fault-tolerant ICs in GPS modules to handle signal drops.
• NTC electricity meters: ICs with built-in self-test to detect tampering.

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4. Comparison: Fault Detection Methods

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5. Real-World Applications

eSewa Payment System

• Problem: Transaction data (e.g., 10110101) must be error-free.
• Solution: Uses CRC (Cyclic Redundancy Check) for error detection.
• How it works:
  1. Sender computes CRC for payment details.
  2. Receiver recomputes CRC; if mismatch → fraud alert.

Ncell Network

• Problem: Radio signals may corrupt data.
• Solution: Uses Hamming codes in base stations.
• How it works:
  1. Data is encoded with Hamming (7,4).
  2. If a bit flips during transmission, the code corrects it.

Bank ATMs (e.g., Global IME)

• Problem: Card swipes may have noise.
• Solution: Redundant sensors + parity checks.
• How it works:
  1. Three magnetic stripe readers verify card data.
  2. If two agree, the third is ignored (TMR).

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Exam Tip

1. Parity/Hamming: Always show the syndrome calculation step-by-step.
2. IC Manufacturing: Memorize the 5 key steps (wafer → oxidation → lithography → doping → metallization).
3. Fault Types: Know stuck-at, short, open faults and how to test them.
4. Real-world links: Connect parity to eSewa, Hamming to NEPSE, and TMR to aircraft systems.
5. Diagrams: Draw Hamming code tables, photolithography steps, and fault detection flowcharts.

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Visual Summary:

In the real world

• WhatsApp messages: Uses parity-like checksums to detect corrupted data during transmission, ensuring message integrity (e.g., when sending a payment request via WhatsApp Pay).
• eSewa transactions: Employs Hamming codes to validate transaction details (e.g., merchant ID, amount) before processing, preventing errors in financial data.
• NEPSE stock data: Relies on Hamming codes to correct single-bit errors in real-time stock price updates (e.g., 1011 → 1101101), ensuring accurate trading decisions.