Sequential Logic: Flip-Flops, State Machines & Timing

Sequential Logic: Memory in Digital Circuits

Sequential circuits differ from combinational circuits because they remember past inputs using memory elements (flip-flops). Their output depends on both current inputs and previous states. This unit explains:

1. Flip-flops: Basic memory elements (SR, D, JK, T) and their characteristics.
2. State machines: Mealy vs. Moore models, state diagrams, and excitation tables.
3. Timing diagrams: How clock signals control state changes.
4. Design procedures: Step-by-step methods to build sequential circuits.

1. Flip-Flops: The Building Blocks of Memory

Flip-flops are binary storage elements that hold a bit (0 or 1) until changed by an input signal. They are the foundation of registers, counters, and state machines.

Types of Flip-Flops

Type	Symbol	Inputs	Outputs	Key Feature
SR		S (Set), R (Reset)	Q, Q̅	Asynchronous, no clock
D		D (Data)	Q, Q̅	Stores input at clock edge
JK		J, K	Q, Q̅	Universal flip-flop (can emulate SR/D)
T		T (Toggle)	Q, Q̅	Toggles output on clock edge

How Flip-Flops Work: A Worked Example

Problem: Design a circuit that toggles an output Q every time an input X is pressed, using a T flip-flop. Solution:

1. Connect X to the T input of the T flip-flop.
2. On each rising edge of the clock, if X = 1, the flip-flop toggles Q.
3. If X = 0, Q remains unchanged.

flowchart LR
    A["Clock"] --> B["T Flip-Flop"]
    C["X (Input)"] --> B
    B --> D["Q (Output)"]

Real-World Tie-In:

• Pathao’s Ride Allocation: Pathao uses flip-flops in its backend to track the "state" of a ride (e.g., "waiting for driver," "driver assigned," "ride in progress"). Each state transition (like assigning a driver) is triggered by a clock signal (e.g., a timer or user action), similar to how a flip-flop changes state on a clock edge.

2. State Machines: Modeling Sequential Behavior

State machines represent systems that transition between states based on inputs. They are classified into:

• Moore Machine: Output depends only on the current state.
• Mealy Machine: Output depends on both current state and inputs.

State Diagram Example: Traffic Light Controller

Problem: Design a state machine for a traffic light that cycles through Green → Yellow → Red → Green. States:

1. Green: Cars pass; pedestrians wait.
2. Yellow: Warning before red.
3. Red: Stop cars; pedestrians cross.

stateDiagram-v2
    [*] --> Green
    Green --> Yellow : after 30s
    Yellow --> Red : after 5s
    Red --> Green : after 25s
    Green --> [*]

Excitation Table for D Flip-Flops:

Real-World Tie-In:

• eSewa Payment Queue: When you request a payment, eSewa’s backend processes your request through states:
  1. Pending: Flip-flop holds state until bank verifies funds.
  2. Processing: Another flip-flop toggles when the bank approves.
  3. Completed: Final state, output sent to your phone. Each transition is triggered by a clock-like event (e.g., bank response time).

3. Timing Diagrams: Visualizing State Transitions

Timing diagrams show how signals (clock, inputs, outputs) change over time. They are critical for debugging sequential circuits.

Example: Timing diagram for a D flip-flop with D = X, clock frequency = 1 Hz.

       _______       _______       _______
Clock:       |       |       |       |
       _______       _______       _______
X:     _|       |___|       |___|       |
       --------------------------------
Q:     |       |___|       |___|       |

Key Observations:

• Q changes only on the rising edge of the clock.
• If X changes during the clock pulse, the last value is stored (metastability risk).

Real-World Tie-In:

• NTC Electricity Billing: Your monthly bill is calculated based on the state of your meter (flip-flop) at specific times (clock edges). The meter’s flip-flop toggles for every unit of electricity consumed, and the billing system reads this state at the end of the month.

4. Design Procedure for Sequential Circuits

1. Define States: List all possible states (e.g., Green, Yellow, Red).
2. Draw State Diagram: Show transitions between states.
3. Write Excitation Table: Determine inputs needed for each state transition.
4. Derive Input Equations: Simplify Boolean expressions for flip-flop inputs.
5. Draw Circuit Diagram: Connect flip-flops and gates based on equations.
6. Verify with Timing Diagram: Simulate operation.

Worked Example: Design a Mod-3 Counter using T flip-flops.

1. States: 00, 01, 10 (binary).

2. Transitions:

   • 00 → 01 (toggle LSB)
   • 01 → 10 (toggle MSB)
   • 10 → 00 (reset)

3. Excitation Table:

   Q₁Q₀	T₁	T₀
   00	0	1
   01	1	1
   10	1	0

4. Input Equations:

   • $T_0=\overline{Q_1}$
   • $T_1=Q_0$

Real-World Tie-In:

• Khalti Transaction ID Generation: Khalti assigns a unique transaction ID by cycling through a counter (like our Mod-3 example) to generate sequential numbers. In reality, it uses a much larger counter (e.g., Mod-2³²) to ensure uniqueness.

5. Advantages and Disadvantages of Sequential Circuits

6. Common Mistakes and Pitfalls

1. Forgetting Clock Edges: Flip-flops change state only on clock edges (rising/falling). Ignoring this causes incorrect behavior.
2. Metastability: If an input changes too close to the clock edge, the flip-flop may produce an invalid output.
3. State Encoding Errors: Using Gray code instead of binary can reduce glitches in counters.
4. Ignoring Reset: Always include an asynchronous reset for initialization.

In the Real World

1. Pathao’s Driver Assignment:

   • Idea Used: Moore Machine State Transitions
   • How: When you request a ride, Pathao’s backend cycles through states:
     • Waiting for Driver (flip-flop state 00),
     • Driver Assigned (state 01),
     • Ride in Progress (state 10),
     • Trip Completed (state 11).
   • The state changes only on clock-like events (e.g., driver acceptance, ride start/end).

2. Ncell’s Call Routing:

   • Idea Used: JK Flip-Flop for Call Forwarding
   • How: When you enable call forwarding, a JK flip-flop in Ncell’s switch stores your preference. The flip-flop toggles between:
     • Forwarding Off (Q = 0),
     • Forwarding On (Q = 1).
   • The flip-flop’s J and K inputs are controlled by your USSD command (e.g., *123*1# to enable).

3. NEPSE Stock Market Updates:

   • Idea Used: Shift Register for Data Transmission
   • How: NEPSE’s servers use shift registers to sequentially transmit stock prices to your trading app. Each bit of the price (e.g., 10101010 for 170) is shifted out one by one, like a conveyor belt, to update your screen in real time.

Exam Tip

1. Always Show State Diagrams: Examiners love visuals. For every sequential circuit question, draw the state diagram first.
2. Label Flip-Flop Inputs Clearly: Use $Q_{n+1}$ for next-state equations and $Q_n$ for present-state variables.
3. Practice Timing Diagrams: Questions often ask to sketch the output of a flip-flop circuit given inputs and clock signals. Master this!
4. Memorize Flip-Flop Truth Tables:
   • SR: Forbidden state is S=1, R=1.
   • JK: J=1, K=1 toggles the output.
   • T: T=1 toggles; T=0 holds.
5. Watch for Hidden Clocks: In real-world examples (like eSewa or Pathao), the "clock" might be a timer, user action, or sensor trigger. Label it clearly in your answer.
6. Use Karnaugh Maps for Excitation Tables: Simplify Boolean expressions for flip-flop inputs using K-maps to save marks.