Microprocessors & Architecture: Basics, CPU, Buses, and Memory Hierarchy

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Core Concepts: What is a Microprocessor?

A microprocessor is the central processing unit (CPU) of a computer, implemented on a single integrated circuit (chip). It performs arithmetic, logical, and control operations to execute instructions from programs.

Key Definitions

• CPU (Central Processing Unit): The "brain" of a computer that fetches, decodes, executes, and stores instructions.
• Microprocessor: A CPU on a single chip (e.g., Intel 8085, ARM Cortex).
• Microcontroller: A microprocessor with built-in memory, I/O peripherals, and timers (e.g., Arduino, PIC microcontrollers).

Why the Distinction Matters?

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Internal Architecture of a Microprocessor

The 8085 microprocessor (a classic example) consists of functional blocks that work together to execute instructions.

Functional Blocks of 8085

Key Registers and Their Functions

Worked Example: Flag Register After SUB B Given:

• A = 45H, B = 67H
• Instruction: SUB B (Subtract B from A)

Steps:

1. A - B → 45H - 67H = 1EH (with Borrow).
2. Flags Set:
   • Zero Flag (Z): 0 (Result ≠ 00H).
   • Carry Flag (CY): 1 (Borrow occurred).
   • Sign Flag (S): 1 (Result is negative in signed interpretation).
   • Parity Flag (P): 0 (Odd number of 1s in 1EH).

Final PSW: 1 0 1 0 0 0 1 0 (Binary: A2H in hex).

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Bus Organization in 8085

The 8085 uses three buses to communicate with memory and I/O devices:

1. Address Bus (16 lines): Carries memory/I/O addresses (64KB addressable).
2. Data Bus (8 lines): Transfers data between CPU, memory, and I/O.
3. Control Bus: Handles signals like READ, WRITE, RESET, INTR.

Real-World Analogy:

• Address Bus: Like a postal address telling where to deliver a letter (data).
• Data Bus: The letter itself being transported.
• Control Bus: Traffic signals ensuring smooth delivery.

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Memory Hierarchy: Speed vs. Cost Tradeoff

Computers use a memory hierarchy to balance speed, capacity, and cost.

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In the Real World

1. eSewa (Nepal):

   • Idea Used: Microprocessor-based payment processing.
   • How? The eSewa server uses high-speed microprocessors (e.g., Intel Xeon) to handle thousands of transactions per second. The memory hierarchy ensures fast access to frequently used transaction records (cached in RAM), while historical data is stored in SSDs/HDDs.

2. Pathao (Ride-Hailing App):

   • Idea Used: Microcontroller in IoT devices + Microprocessor in backend servers.
   • How?
     • Driver App (Microcontroller): ESP32 (low-power, built-in Wi-Fi) tracks location and sends updates.
     • Server (Microprocessor): Cloud servers (e.g., AWS) use pipelining and parallel processing to match drivers to riders in milliseconds.

3. NTC (Nepal Telecom) Network:

   • Idea Used: Bus organization in routers.
   • How? Routers (e.g., Cisco ASR) use address/data/control buses to forward packets. The address bus determines the destination IP route, while the data bus transmits the packet payload.

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Instruction Cycle, Machine Cycle, and T-States

1. Instruction Cycle

The fetch-decode-execute cycle repeated for every instruction:

1. Fetch: Get instruction from memory (using PC).
2. Decode: Interpret instruction (using IR).
3. Execute: Perform operation (ALU or I/O).
4. Store: Save result (if needed).

2. Machine Cycle

A machine cycle is one complete operation (e.g., fetch, memory read/write).

• Fetch Cycle: CPU reads instruction from memory.
• Execute Cycle: CPU reads/writes data from/to memory.

3. T-States (Clock Cycles)

The 8085 uses a clock signal divided into T-states (each T-state = 1 clock cycle).

• Example: MVI A, 32H (Move immediate value to A) takes 3 machine cycles (10 T-states).

Worked Example: Tracing MVI A, 32H

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Microprocessor vs. Microcontroller: A Comparative Table

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Exam Tip

1. Definitions First: Always define key terms (e.g., "A microprocessor is a CPU on a single chip...").
2. Draw Diagrams: For bus organization, memory hierarchy, or 8085 architecture, label every component.
3. Flag Register Questions: For SUB, ADD, or CMP, list all flags (Zero, Carry, Sign, Parity) with justification.
4. Real-World Links: Connect theory to apps like eSewa (memory hierarchy), Pathao (microcontrollers), or NTC (bus organization).
5. T-State Calculation: Memorize common instructions:
   • MVI (Move Immediate): 10 T-states.
   • ADD B: 4 T-states.
   • JMP: 10 T-states.

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Final Note: This unit is the foundation for all microprocessor topics. Master the 8085 architecture, bus signals, and memory hierarchy—they appear in every subsequent unit!