Digital LogicUnit 711 min read
Digital System Design: MUX, DEMUX, Encoders, Decoders, Counters & Adders
Unit 7 of Digital Logic covers the design and application of core digital systems—multiplexers, demultiplexers, encoders, decoders, counters, and adders—using combinational and sequential logic, with real-world examples from Nepalese tech (eSewa, Ncell) and global platforms (Google, WhatsApp).
Core Concepts
1. Digital Systems: Definition and Classification
A digital system is an electronic system that processes discrete data (binary: 0s and 1s) using logic gates, flip-flops, and combinational/sequential circuits. It can be classified into:
Key Idea:
- Combinational circuits (e.g., MUX, DEMUX) have no memory; their output is purely a function of inputs.
- Sequential circuits (e.g., counters, registers) store state (via flip-flops) and change output over time.
2. Multiplexers (MUX)
A multiplexer (MUX) selects one of many input lines and forwards it to a single output line based on select lines (S).
How It Works
- Inputs:
I0, I1, ..., In(data lines) - Select Lines:
S0, S1, ..., Sm(binary address) - Output:
Y = I(S0S1...Sm) - Example: A 4:1 MUX has 4 inputs, 2 select lines, and 1 output.
Design of a 4:1 MUX
Truth Table:
| S1 | S0 | Y (Output) |
|---|---|---|
| 0 | 0 | I0 |
| 0 | 1 | I1 |
| 1 | 0 | I2 |
| 1 | 1 | I3 |
Boolean Expression:
Circuit Diagram:
Real-World Example:
- eSewa Payment System: Uses MUX-like logic to route transactions from multiple payment gateways (credit card, mobile wallet, bank transfer) to a single processing unit based on user selection.
3. Demultiplexers (DEMUX)
A demultiplexer (DEMUX) takes a single input and routes it to one of many output lines based on select lines.
How It Works
- Input:
I(single data line) - Select Lines:
S0, S1, ..., Sm(binary address) - Outputs:
Y0, Y1, ..., Yn(only one active at a time)
Design of a 1:4 DEMUX
Truth Table:
| S1 | S0 | Y0 | Y1 | Y2 | Y3 |
|---|---|---|---|---|---|
| 0 | 0 | I | 0 | 0 | 0 |
| 0 | 1 | 0 | I | 0 | 0 |
| 1 | 0 | 0 | 0 | I | 0 |
| 1 | 1 | 0 | 0 | 0 | I |
Boolean Expression for Y2:
Circuit Diagram:
Real-World Example:
- Ncell’s SMS Delivery System: A single SMS input is routed to different output queues (e.g., promotional, transactional, alerts) based on the recipient’s subscription type (select lines).
4. Encoders and Decoders
Encoder
Converts multiple input lines into a binary code (e.g., 8:3 encoder converts 8 inputs to 3-bit binary).
Example: 8:3 Encoder
- Inputs:
I0, I1, ..., I7(only one active at a time) - Outputs:
Y2 Y1 Y0(3-bit binary code) - Don’t Care Conditions: If no input is active, outputs can be anything (X).
Truth Table (Partial):
| I7 | I6 | ... | I0 | Y2 Y1 Y0 |
|---|---|---|---|---|
| 1 | 0 | ... | 0 | 1 1 1 |
| 0 | 0 | ... | 1 | 0 0 0 |
| X | X | ... | X | X X X |
Real-World Example:
- Khalti’s QR Code Scanner: Encodes the selected payment method (e.g., bank, wallet) into a binary string for processing.
Decoder
Converts binary code into multiple output lines (e.g., 3:8 decoder converts 3-bit input to 8 outputs).
Example: 3:8 Decoder
- Inputs:
A2 A1 A0(3-bit binary) - Outputs:
Y0, Y1, ..., Y7(only one active at a time)
Truth Table (Partial):
| A2 | A1 | A0 | Y0 | Y1 | Y2 | Y3 | Y4 | Y5 | Y6 | Y7 |
|---|---|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 |
| ... | ... | ... | ... | ... | ... | ... | ... | ... | ... | ... |
Circuit Diagram (3:8 Decoder):
Real-World Example:
- NTC’s Traffic Light Controller: Uses a decoder to activate one of 8 traffic signals based on a 3-bit input (time slot).
5. Counters
Counters are sequential circuits that count pulses and store the count in binary.
Types of Counters
| Type | Description | Example Use Case |
|---|---|---|
| Asynchronous | Ripple effect (each flip-flop triggers the next) | Simple event counters (e.g., Daraz order IDs) |
| Synchronous | All flip-flops triggered simultaneously (faster) | High-speed applications (e.g., NEPSE stock tickers) |
| Up/Down | Counts up or down based on control input | Bidirectional applications (e.g., WhatsApp message timestamps) |
| Ring | Cyclic counting (e.g., 000 → 001 → ... → 111 → 000) | Circular buffers (e.g., YouTube video loops) |
Design of a 3-bit Synchronous Binary Counter
State Diagram:
Flip-Flop Excitation Table (Using T Flip-Flops):
| Q2 Q1 Q0 | T2 | T1 | T0 |
|---|---|---|---|
| 0 0 0 | 1 | 1 | 1 |
| 0 0 1 | 1 | 1 | 0 |
| 0 1 0 | 1 | 0 | 1 |
| 0 1 1 | 1 | 0 | 0 |
| 1 0 0 | 0 | 1 | 1 |
| 1 0 1 | 0 | 1 | 0 |
| 1 1 0 | 0 | 0 | 1 |
| 1 1 1 | 0 | 0 | 0 |
Circuit Diagram (Using T Flip-Flops):
Real-World Example:
- NEPSE Stock Counter: A synchronous counter tracks the number of trades executed in real-time, updating the display every millisecond.
6. Binary Adders
Adds two binary numbers and produces a sum and carry.
Types of Adders
| Type | Description | Example Use Case |
|---|---|---|
| Half Adder | Adds 2 bits, outputs Sum and Carry | Basic ALU operations (e.g., Google’s internal calculations) |
| Full Adder | Adds 3 bits (2 inputs + carry-in), outputs Sum and Carry-out | CPU arithmetic (e.g., WhatsApp encryption) |
| Ripple Carry | Cascades full adders for multi-bit addition | Simple calculators (e.g., eSewa bill generators) |
| Carry Look-Ahead | Faster addition by predicting carries | High-performance processors (e.g., Ncell’s billing systems) |
Design of a 3-bit Binary Adder (Ripple Carry)
Block Diagram:
flowchart LR
subgraph Adder["3-bit Ripple Carry Adder"]
A2["A2"] --> FA0["Full Adder 0"]
B2["B2"] --> FA0
FA0 -->|"Sum0"| OUT0["Sum0"]
FA0 -->|"Carry"| FA1["Full Adder 1"]
A1["A1"] --> FA1
B1["B1"] --> FA1
FA1 -->|"Sum1"| OUT1["Sum1"]
FA1 -->|"Carry"| FA2["Full Adder 2"]
A0["A0"] --> FA2
B0["B0"] --> FA2
FA2 -->|"Sum2"| OUT2["Sum2"]
FA2 -->|"Carry"| OUT3["Carry-out"]
endReal-World Example:
- Khalti’s Transaction Processor: Uses a ripple carry adder to verify the total amount in a batch of payments before settlement.
In the Real World
eSewa’s Payment Routing:
- Uses a multiplexer to select the payment method (credit card, mobile wallet, bank transfer) based on user input, then routes the transaction to the appropriate processing unit.
Ncell’s SMS Delivery:
- A demultiplexer directs incoming SMS messages to different queues (promotional, transactional, alerts) based on the recipient’s subscription tier.
NEPSE Stock Exchange:
- A synchronous counter tracks the number of trades executed per second, updating the live display in real-time for investors.
Khalti’s QR Code System:
- An encoder converts the selected payment method (e.g., bank account, wallet) into a binary string, which is then scanned and processed.
Google’s Data Centers:
- Carry-lookahead adders are used in high-performance servers to accelerate arithmetic operations for search algorithms and machine learning.
Exam Tip
Design Questions:
- Always draw the circuit diagram (use standard gate symbols).
- For MUX/DEMUX, write the truth table first, then derive the Boolean expression.
- For counters, show the state diagram and excitation table (T, D, or JK flip-flops as per the question).
Common Mistakes to Avoid:
- Forgetting to label inputs/outputs clearly in diagrams.
- Misplacing don’t care conditions in encoders (they can simplify the circuit).
- In counters, incorrect flip-flop connections (e.g., wrong excitation logic).
Short-Answer Tips:
- Define a digital system as: "A system that processes discrete data using logic gates and binary signals."
- For asynchronous vs. synchronous counters, emphasize speed (synchronous is faster) and propagation delay (asynchronous has ripple delay).
Practical Application Questions:
- Relate MUX/DEMUX to data routing (e.g., "How would you design a system to route user requests in a bank’s ATM network?").
- For counters, think of real-time applications like traffic light controllers or event counters.
Based on the TU BITM syllabus for Digital Logic (IT233), unit 7.
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