Tribhuvan University
Bachelor of Information Technology Management
Semester 2 · Model question
Course Title: Digital Logic (IT233)
Full Marks: 60Pass Marks: 30Time: 3 Hrs
Candidates are required to give their answers in their own words as for as practicable.
Group A
- 1.
Simplify xy+x'z+yz to minimum number of literals using Boolean Algebra.
- 2.
Implement OR and AND gate using NAND gates only.
- 3.
We can't have both input 1 in a basic flip flop constructed with NOR gates Justify.
- 4.
In what case is it economical to use PLA than PAL? Explain
- 5.
List out the major characteristics of IC.
Group B
Problem Solving / Short Answer Questions (Answer any SIX Questions)(6 × 5 = 30)
- 6.5
Differentiate between T and JK flip-flop along with its Truth Table and logic diagram.
- 7.5
Implement the function F(W,X,Y,Z)=∑(0,2,4,6,10,12,14) using multiplexer.
- 8.5
Design a 3-bit synchronous binary counter using any flip-flop.
- 9.5
What is Shift Register? You are provide with a bit sequence 1101, and you are asked to extract those bits after right shifting. Which shift register would you use? Discuss with necessary block diagrams and timing diagrams.
- 10.5
Design 8X1 multiplexer
Answer comingAlso asked in 2023
- 11.5
Design a 3-bit synchronous counter.
Answer comingAlso asked in 2023
- 12.5
Mention the design procedure of a combinational circuit.
Group C
- 13.
Design 4X16 decoder using suitable number of 2X4 along with its truth table and explain its operating mechanism.
- 14.
Design a circuit diagram for a given state diagram following standard design procedure [figure in the original paper]
- 15.
Design a MOD-16 synchronous Up/Down Counter.
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