Multiplexers, Demux, Decoders & Encoders: Design, Logic & Applications

TAKEAWAYS:

• Multiplexers select one of n inputs to send to a single output based on m select lines, using the formula $2^m\ge n$.
• Demultiplexers do the reverse: take one input and route it to one of n outputs, controlled by m select lines.
• Decoders convert n input lines into $2^n$ unique outputs (e.g., a 3-to-8 decoder has 8 outputs for 3 inputs).
• Encoders prioritize inputs to generate a binary code (e.g., a 8-to-3 encoder converts 8 inputs into 3-bit binary).
• Practical uses: Decoders drive LED displays (e.g., NTC bus timings), multiplexers reduce wiring in sensors (e.g., Daraz delivery tracking), and encoders detect errors in transactions (e.g., eSewa checksums).

1. Multiplexers (MUX): Data Selectors

A multiplexer (MUX) is a combinational circuit that selects one of n input lines and sends it to a single output line. It uses select lines (control inputs) to choose which input is active.

Key Concepts

• Inputs: $D_0,D_1,\dots ,D_{n-1}$ (data inputs).
• Select Lines: $S_0,S_1,\dots ,S_{m-1}$ (control inputs, where $2^m\ge n$).
• Output: $Y=D_{S_{m-1}{S}_{m-2}\dots S_0}$ (binary value of select lines determines the chosen input).

Example: 4-to-1 MUX

flowchart LR
    A["D0"] --> B["MUX"]
    C["D1"] --> B
    D["D2"] --> B
    E["D3"] --> B
    F["S1"] --> B
    G["S0"] --> B
    B --> H["Y"]

Truth Table:

Logic Expression

The output $Y$ can be written as: $$Y=\overline{S_1}\overline{S_0}{D}_0+\overline{S_1}{S}_0{D}_1+S_1\overline{S_0}{D}_2+S_1{S}_0{D}_3$$

Applications

• Real-World Example: Pathao’s Ride Allocation Pathao uses multiplexers to select the nearest driver’s location from multiple GPS inputs (e.g., 8 drivers → 3 select lines to pick the closest one).

  flowchart TD
      A["Driver 1 GPS"] --> B["MUX"]
      C["Driver 2 GPS"] --> B
      D["Driver 3 GPS"] --> B
      E["Select Lines"] --> B
      B --> F["Nearest Driver"]

2. Demultiplexers (DEMUX): Data Distributors

A demultiplexer (DEMUX) does the opposite of a MUX: it takes one input and routes it to one of n outputs based on select lines.

Key Concepts

• Input: Single data line ($I$).
• Select Lines: $S_0,S_1,\dots ,S_{m-1}$ (control which output is active).
• Outputs: $Y_0,Y_1,\dots ,Y_{n-1}$ (only one output is active at a time).

Example: 1-to-4 DEMUX

flowchart LR
    A["I"] --> B["DEMUX"]
    F["S1"] --> B
    G["S0"] --> B
    B --> C["Y0"]
    B --> D["Y1"]
    B --> E["Y2"]
    B --> H["Y3"]

Truth Table:

Logic Expression

Each output is: $$Y_i=I\cdot \text{(minterm of select lines for }i\text{)}$$ For $Y_2$: $$Y_2=I\cdot S_1\overline{S_0}$$

Applications

• Real-World Example: NTC Bus Timing Signals NTC uses a 1-to-8 DEMUX to send control signals to different bus stops based on the route number (select lines).

3. Decoders: Minterm Generators

A decoder converts n input lines into $2^n$ unique outputs. Each output corresponds to a minterm of the inputs.

Key Concepts

• Inputs: $n$ lines (e.g., 3 inputs → 8 outputs).
• Outputs: $2^n$ lines, each representing a unique combination of inputs.
• Enable Input: Some decoders have an active-low enable (E) to control all outputs.

Example: 3-to-8 Decoder

flowchart LR
    A["A2"] --> B["3-to-8 Decoder"]
    C["A1"] --> B
    D["A0"] --> B
    B --> E["Y0"]
    B --> F["Y1"]
    B --> G["Y2"]
    B --> H["Y3"]
    B --> I["Y4"]
    B --> J["Y5"]
    B --> K["Y6"]
    B --> L["Y7"]

Truth Table:

Logic Expression

Each output is: $$Y_i=\overline{A_2}\overline{A_1}\overline{A_0}\text{(for }{Y}_0\text{)}$$ $$Y_7=A_2{A}_1{A}_0$$

Applications

• Real-World Example: LED Display in eSewa Receipts A 3-to-8 decoder drives 8 LEDs to show transaction status (e.g., $Y_3$ = "Payment Successful").

  flowchart TD
      A["Transaction Data"] --> B["3-to-8 Decoder"]
      B --> C["LED 0: Failed"]
      B --> D["LED 1: Pending"]
      B --> E["LED 2: Processing"]
      B --> F["LED 3: Success"]

4. Encoders: Priority Logic

An encoder does the reverse of a decoder: it converts active inputs into a binary code. It often includes priority logic (e.g., if multiple inputs are active, the highest-priority one is encoded).

Key Concepts

• Inputs: $n$ lines (only one active at a time).
• Outputs: $m$ lines (where $2^m\ge n$).
• Priority: Higher inputs take precedence (e.g., $I_7$ > $I_6$ > ... > $I_0$).

Example: 8-to-3 Encoder

flowchart LR
    A["I0"] --> B["8-to-3 Encoder"]
    C["I1"] --> B
    D["I2"] --> B
    E["I3"] --> B
    F["I4"] --> B
    G["I5"] --> B
    H["I6"] --> B
    I["I7"] --> B
    B --> J["A2"]
    B --> K["A1"]
    B --> L["A0"]

Truth Table (Priority Logic):

Logic Expression

For $A_2$ (priority for $I_4$ to $I_7$): $$A_2=I_4+I_5+I_6+I_7$$

Applications

• Real-World Example: Khalti Transaction Error Detection An 8-to-3 encoder checks for invalid transaction inputs (e.g., if $I_2$ = "Duplicate Payment" is active, it encodes to $A_2{A}_1{A}_0=010$).

5. Comparisons: MUX vs. DEMUX vs. Decoder vs. Encoder

6. Implementing Boolean Functions

Decoders and MUX can implement any Boolean function. Here’s how:

Example: Implement $F=\Sigma (1,2,3,4)$ using a 4-to-1 MUX

1. Identify minterms: $F=m_1+m_2+m_3+m_4$.
2. Assign inputs:
   • $D_0=0$ (unused),
   • $D_1=1$ (for $m_1$),
   • $D_2=1$ (for $m_2$),
   • $D_3=1$ (for $m_3$),
   • $D_4=1$ (for $m_4$).
3. Select lines: $S_1{S}_0$ (since 4 inputs need 2 select lines).

Circuit:

flowchart LR
    A["D0=0"] --> B["MUX"]
    C["D1=1"] --> B
    D["D2=1"] --> B
    E["D3=1"] --> B
    F["D4=1"] --> B
    G["S1"] --> B
    H["S0"] --> B
    B --> I["F"]

Example: Implement $F=\Sigma (0,3,5,7)$ using a 3-to-8 Decoder

1. Connect minterms to outputs:
   • $Y_0=1$ (for $m_0$),
   • $Y_3=1$ (for $m_3$),
   • $Y_5=1$ (for $m_5$),
   • $Y_7=1$ (for $m_7$).
2. Other outputs: Tie to 0.

Circuit:

7. Practical Design: 5x32 Decoder using Smaller Decoders

Problem: Design a 5x32 decoder using 3x8 decoders with enable and a 2x4 decoder.

Solution:

1. Break down: 5 inputs → 32 outputs.
   • Use 4 select lines for 16 outputs, but we need 32.
   • Step 1: Use a 2x4 decoder to enable two 3x8 decoders.
   • Step 2: Each 3x8 decoder covers 8 outputs, totaling 16. Repeat for the other 16.

Block Diagram:

flowchart TD
    A["A4"] --> B["2-to-4 Decoder"]
    C["A3"] --> B
    B --> D["Enable 3x8 Decoder 1"]
    B --> E["Enable 3x8 Decoder 2"]
    D --> F["3x8 Decoder 1"]
    E --> G["3x8 Decoder 2"]
    F --> H["Y0-Y7"]
    G --> I["Y8-Y15"]
    A["A2"] --> F
    A["A1"] --> F
    A["A0"] --> F
    A["A2"] --> G
    A["A1"] --> G
    A["A0"] --> G

## In the Real World

1. eSewa Transaction Validation

   • Decoder Use: A 3-to-8 decoder checks transaction status codes (e.g., $Y_4$ = "Refund Initiated").
   • Encoder Use: An 8-to-3 encoder prioritizes error codes (e.g., $I_7$ = "Server Down" overrides $I_3$ = "Low Balance").

2. Daraz Order Fulfillment

   • Multiplexer Use: A 16-to-1 MUX selects the fastest delivery route from 16 GPS inputs based on traffic data (select lines = $S_3{S}_2{S}_1{S}_0$).

3. NTC Bus Timing System

   • Demultiplexer Use: A 1-to-8 DEMUX routes the bus arrival signal to the correct stop (select lines = bus route number).

## Exam Tip

1. For MUX/DEMUX Questions:

   • Always draw the block diagram and truth table.
   • Label inputs/outputs clearly (e.g., $D_0$ to $Y_3$).
   • Show the logic expression for the output.

2. For Decoder/Encoder Questions:

   • Decoders: List all $2^n$ outputs and their minterms.
   • Encoders: Show priority logic (e.g., $I_7$ has highest priority).
   • Implementation: If asked to use a MUX/decoder for a Boolean function, map minterms to inputs/outputs.

3. Common Pitfalls:

   • Forgetting the enable input in decoders.
   • Misassigning select lines in MUX/DEMUX (e.g., $S_1{S}_0$ vs. $S_0{S}_1$).
   • Not showing unused inputs tied to 0/1 in encoders.

4. Past Exam Patterns:

   • Design questions: Always show block diagrams (no gate-level circuits unless asked).
   • Implementation questions: Use MUX/decoder/PLA as specified in the question.
   • Short notes: Define terms precisely (e.g., "A decoder converts $n$ inputs to $2^n$ outputs").