Draw a block diagram of 80286 microprocessor and explain.

The Intel 80286 is a 16-bit microprocessor with a 24-bit address bus (16 MB of physical memory). It introduced protected mode with memory management and protection. Internally it has four units that work in parallel (pipelining):

      Address bus A23-A0      Data bus D15-D0
            ^                       ^
            |                       |
  +---------+-----------------------+---------+
  |               BUS UNIT (BU)                |
  |  address latches, data transceivers,       |
  |  bus control, 6-byte prefetch queue        |
  +---------+-----------------------+---------+
            ^                       |
            | physical address      v prefetched bytes
  +---------+---------+   +---------+---------+
  |  ADDRESS UNIT (AU)|   | INSTRUCTION UNIT  |
  |  segment regs,    |   | (IU) decodes      |
  |  descriptor cache,|   | 3-instruction     |
  |  offset adder     |   | queue             |
  +---------+---------+   +---------+---------+
            ^                       |
            | offset                v decoded instructions
  +---------+-----------------------+---------+
  |            EXECUTION UNIT (EU)             |
  |  ALU, general registers, flags, control    |
  +--------------------------------------------+

1. Bus Unit (BU): does all bus operations: fetching instructions and reading/writing memory and I/O. It prefetches up to 6 bytes of instructions into a queue while other units are busy, and generates the bus control signals.
2. Instruction Unit (IU): takes bytes from the prefetch queue, decodes them, and keeps up to 3 decoded instructions in its own queue ready for the EU.
3. Execution Unit (EU): executes the decoded instructions using the ALU, the general registers (AX, BX, CX, DX, SP, BP, SI, DI), the flag register and the control unit. It requests memory operands from the address unit.
4. Address Unit (AU): calculates the physical address from segment and offset. In real mode it shifts the segment and adds the offset (like the 8086). In protected mode it uses descriptor tables (GDT/LDT), with cached descriptors that give each segment's 24-bit base, limit and access rights, and it checks the limits and privilege levels.

Because the four units overlap their work, the 80286 is much faster than the 8086 at the same clock speed.