Pokhara University
Bachelor of Engineering in Computer Engineering
Semester 1 · PU Spring 2023
Course Title: Digital Logic
Full Marks: 100Pass Marks: 45Time: 3hrs.
Candidates are required to give their answers in their own words as far as practicable.
- 1.7
- a) What are the key advantages of digital systems over analog systems in modern technology? Why design of a digital system offers more flexibility than an analog system?
- b) Perform the conversion as indicated. kMeroE 8
- i) G743).0=(r koMerc ii, (1110110)2 = (?) gray iii, (58.43)10= (2 )Excess-3
- iv) 72532 —3250 10’s complement
- 2.15
- a) State and prove De-Morgan’s theorem for two variables. Explain the universal property of the NAND gate with appropriate logic gates
- b) Using the Karnaugh map method obtain the minimal product of the sums expression for the function. F(A, B, C, D) = ¥ (0, 2, 3, 6, 7) +d (8, 10, 11, 15) also write its standard Product of Sum(POS) form.
- 3.8
- a) Design 3 bit odd parity generator circuit. i
- b) Design Full adder circuit using two half adders and an OR gate and draw the logic diagram.
- 4.16
- a) How is encoder different from decoder? Implement the following Boolean function F(w,x, y,z)=&,, (1,3,6,7,11,15)using 8 to Multiplexer.
OR
Design a 4 to 2 line priority encoder and draw the circuit diagram.
- b) Find out the logical expression of two bit magnitude comparator and draw the circuit diagram.
OR
A combinational circuit is defined by the function 1 Fi (X,Y,Z) = 7G,5,7) and F2(X,Y,Z) = 2:(4,5,7) Implement the circuit with a Programmable Logic Array (PLA).
- 5.15
- a) Design a MOD 10 asynchronous counter using a JK flip-flop and show its working, counting sequence, and timing diagram.
- b) Based on the given state diagram design the sequential circuit using the appropriate flip-flop. ° me mes ee Spee 1 A ° <O Op 1 4 m0) Jo
- 6.15
- a) Design a single combinational logic circuit that performs the addition of two input bits( a and b) when third-bit c is set to 0 whereas, the same circuit performs the subtraction of the same two input bits when c is set tol.
- b) Design a basic ALU that performs a basic arithmetic function as well as a basic logical function as shown in the table below. fso[si [ceo [cm |_ fo [o [am [Rasta fof [ea [rant [or _ bo [ee [eer [yor]
- 7.
Write short notes on: (Any two) 2x5
- a) Design of Shifter
- b) Random Access Memory (RAM)
- c) Ring Counter 2
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