Analog-Digital Conversion: ADCs, DACs, Sampling, Quantization & Error Analysis

TAKEAWAYS:

• Analog-to-digital conversion (ADC) transforms continuous signals into discrete digital values via sampling and quantization, governed by the Nyquist theorem ($f_s\ge 2f_{max}$).
• Digital-to-analog conversion (DAC) reconstructs analog signals from digital data, with resolution and linearity critical for accuracy.
• ADC architectures (Flash, SAR, Delta-Sigma) differ in speed, resolution, and power consumption, each suited for specific applications (e.g., audio, industrial sensors).
• Quantization error and aliasing introduce inaccuracies; anti-aliasing filters and oversampling mitigate these issues.
• Real-world systems (e.g., eSewa’s transaction logging, Ncell’s signal processing) rely on ADCs/DACs for data integrity and communication.
• Exam focus: Derive sampling rate requirements, compare ADC types, and analyze errors in signal reconstruction.

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1. Analog-to-Digital Conversion (ADC): Fundamentals

ADC converts a continuous-time, continuous-amplitude analog signal into a discrete-time, discrete-amplitude digital signal. The process involves three key steps:

1. Sampling: Capturing the analog signal at discrete intervals.
2. Quantization: Mapping sampled values to finite digital levels.
3. Encoding: Assigning binary codes to quantized levels.

1.1 Sampling Theorem (Nyquist-Shannon Sampling Theorem)

The sampling rate ($f_s$) must satisfy: $$f_s\ge 2f_{max}$$ where $f_{max}$ is the highest frequency component of the analog signal.

• Violation: Aliasing occurs, distorting the reconstructed signal.
• Example: If a sensor measures temperature variations up to 10 Hz, the sampling rate must be ≥20 Hz.

1.2 Quantization and Quantization Error

• Quantization: Assigning sampled values to the nearest discrete level.
• Quantization Error ($e_q$): $$e_q=x[n]-y[n]$$ where $x[n]$ is the sampled value and $y[n]$ is the quantized level.
• Error Reduction: Increasing the number of bits ($N$) reduces error: $$\text{Resolution}=\frac{V_{FS}}{2^N}$$ where $V_{FS}$ is the full-scale voltage range.

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2. ADC Architectures

Different ADC types are optimized for speed, resolution, and power. Below is a comparison:

2.1 Flash ADC

• Operation: Compares input to a voltage ladder using parallel comparators.
• Advantages: Fastest ADC type.
• Disadvantages: High power consumption, limited resolution.
• Example: Oscilloscopes use Flash ADCs for real-time signal capture.

2.2 SAR ADC

• Operation: Uses a binary search algorithm to approximate the input voltage.
• Steps:
  1. Start with MSB, compare with input.
  2. Adjust DAC output and repeat for LSB.
• Example: Used in Arduino’s ADC for sensor readings (e.g., temperature, light).

2.3 Delta-Sigma ADC

• Operation: Oversamples input, quantizes with 1-bit ADC, and uses digital filtering.
• Advantages: High resolution, low noise.
• Example: Smartphone audio chips (e.g., Qualcomm’s audio processors).

Shows oversampling, 1-bit quantizer, and digital filter. (Image: Em3rgent0rdr, CC0, via Wikimedia Commons)

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3. Digital-to-Analog Conversion (DAC)

DAC reconstructs analog signals from digital data. Key parameters:

• Resolution: Number of bits ($N$), determines step size.
• Linearity: Deviation from ideal output.
• Settling Time: Time to reach final value.

3.1 DAC Architectures

3.2 DAC Error Sources

• Differential Non-Linearity (DNL): Deviation of step size from ideal.
• Integral Non-Linearity (INL): Cumulative error over full range.
• Glitch Impulse: Spikes during bit transitions.

Worked Example: A 10-bit DAC with $V_{ref}=5V$ has a step size of: $$\text{Step size}=\frac{V_{ref}}{2^{10}}=\frac{5V}{1024}\approx 4.88\text{ mV}$$ If the digital input is 1010101001₂ (binary), the output voltage is: $$V_{out}=V_{ref}\times \frac{\text{Decimal value}}{2^{10}}=5V\times \frac{681}{1024}\approx 3.33V$$

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4. Signal Reconstruction and Errors

4.1 Aliasing

• Cause: Sampling rate < $2f_{max}$.
• Effect: High-frequency components appear as lower frequencies.
• Solution: Anti-aliasing filters (low-pass filters before ADC).

4.2 Quantization Noise

• Source: Rounding errors during quantization.
• Reduction: Increase bits or use dithering (adding noise to reduce distortion).

Comparison of Noise Types:

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## In the real world

1. eSewa Transactions:

   • ADC/DAC Use: eSewa’s backend systems use ADCs to digitize payment signals (e.g., card swipes) and DACs to generate confirmation tones or LED feedback.
   • Key Idea: Sampling and quantization ensure transaction data is accurately converted for processing and storage.

2. Ncell’s Mobile Network:

   • ADC Use: Base stations use high-speed ADCs (e.g., Flash or SAR) to sample incoming RF signals for demodulation.
   • Example: A 5G signal at 2.6 GHz requires ADCs with sampling rates >10 GHz to avoid aliasing.

3. Pathao’s Ride-Hailing:

   • DAC Use: GPS coordinates from the app are converted to analog signals for display on driver dashboards (e.g., via a small DAC in the in-car system).
   • Key Idea: Resolution and linearity ensure accurate route rendering.

4. NEPSE Stock Data:

   • ADC Use: Stock price feeds are digitized via ADCs in trading terminals to log price changes (e.g., 16-bit ADCs for high-resolution data).
   • Worked Example: If a stock price changes from Rs. 1000 to Rs. 1000.01, a 12-bit ADC with $V_{ref}=5V$ must resolve steps of ~1.22 mV to capture the change accurately.

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5. Data Acquisition Systems (DAS)

A single-channel DAS consists of:

1. Sensor: Converts physical quantity (e.g., temperature) to analog signal.
2. Signal Conditioning: Amplifies/filters the signal.
3. ADC: Converts analog to digital.
4. Microcontroller: Processes data (e.g., averages samples).
5. Output: Displays or transmits data.

Example: A temperature monitoring system for a server room:

• Sensor: Thermocouple (outputs mV proportional to temperature).
• ADC: 16-bit SAR ADC (e.g., ADC121C021) samples at 1 kHz.
• Calculation: For a range of 0–50°C, the ADC’s LSB represents: $$\text{Resolution}=\frac{50°C}{2^{16}}\approx 0.015°C/\text{LSB}$$

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## Exam Tip

1. Sampling Rate Calculations:

   • Always verify $f_s\ge 2f_{max}$. If not, aliasing occurs.
   • Example Question: "A signal has frequencies up to 5 kHz. What is the minimum sampling rate?" Answer: $f_s=10\text{ kHz}$ (Nyquist rate).

2. ADC/DAC Comparisons:

   • Memorize the trade-offs (speed vs. resolution vs. power) for Flash, SAR, and Delta-Sigma ADCs.
   • Example Question: "Which ADC would you use for a heart rate monitor (1 Hz signal, 12-bit resolution)?" Answer: Delta-Sigma ADC (low power, high resolution).

3. Error Analysis:

   • Quantization error = $\pm \frac{1}{2}$ LSB.
   • Example Question: "A 10-bit ADC measures 3.45V with $V_{ref}=5V$. What is the quantization error?" Steps:
     1. Calculate LSB: $5V/1024\approx 4.88\text{ mV}$.
     2. Quantized value: $3.45V/4.88\text{ mV}\approx 707$ → $707\times 4.88\text{ mV}=3.44V$.
     3. Error: $3.45V-3.44V=1\text{ mV}$ (±0.5 LSB).

4. Real-World Applications:

   • Link theory to systems like eSewa’s payment processing (ADC for card data) or Ncell’s signal demodulation (DAC for audio).
   • Example Question: "How does a smartphone’s microphone use ADC?" Answer: Converts analog sound waves to digital samples (e.g., 44.1 kHz sampling for audio).

5. Diagrams:

   • Draw block diagrams for ADC/DAC architectures and waveforms for aliasing/quantization effects.
   • Example: Sketch a Flash ADC with comparators and a Delta-Sigma ADC with oversampling stages.

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Key Formula Summary: