Tribhuvan University
Bachelor of Computer Application
Semester 1 · TU Board 2023
Course Title: Digital Logic (CACS103)
Full Marks: 60Pass Marks: 24Time: 3 hours
Candidates are required to answer the question in their own words as far as possible.
Group B
Attempt any SIX question.(6 × 5 = 30)
- 2.5
Convert +64.35 into IEEE 754 double precision floating point binary number.
- 3.5
Explain the universal gates with their logic symbol, logic expression, and truth table. Realize an OR Gate using NAND Gate.
Answer comingAlso asked in 2020
- 4.5
Minimize the given Boolean function in both SOP and POS using K-map and realize using basic gates: F(A,B,C,D) = E(0,1,2,5,7,8,9,10,13,15)
- 5.5
Explain 4-bit Binary Parallel Adder. Implement a full Adder using two half Adders.
- 6.5
Define combinational circuit. Design a binary to octal converter.
- 7.5
What is a synchronous sequential circuit? Explain RS NAND latch with block diagram, logic diagram, truth table, and timing diagram.
Answer comingAlso asked in 2026, 2022, 2021, 2020, 2019
- 8.5
Define register. Explain serial-in serial-out register with working mechanism for data input 11010
Group C
Attempt any TWO questions(2 × 10 = 20)
- 9.10
Explain ring counter. Design a 3-bit asynchronous up counter with block diagram, count sequence table, and timing diagram.
- 10.10
Define ECL. Explain 3-bit even parity generator and checker.
- 11.10
Explain the design procedure of a clocked sequential circuit. Design a clocked sequential circuit whose state diagram is given in the figure. [figure in the original paper]
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