Digital Logic TU Board 2024 question paper

Differentiate between combinational and sequential logic circuits. Implement a full adder circuit using a decoder and two OR gates.

Define priority encoder. Explain 8-to-3 priority encoder in detail.

Explain the duality theorem with an example. Draw logic gates that implement the expression:

How does a flip-flop differ from a latch? Explain clocked SR flip-flop with logic diagram, truth table, characteristic table, and excitation table.

Write short notes on (any two): a) State reduction table  b) Multiplexe c) Synchronous and Asynchronous counter

Differentiate between PAL and PLA. Design a combinational circuit with four inputs (BCD digit) and four outputs lines that generate the 2'Complements of the binary input pattern with circuit diagram, truth table, and block diagram.

Explain shift register with parallel load. Design a synchronous Mod-10 counter to count in the sequence 0,2,4,5,6,8 using T flip-flops.

Explain how race condition in JK flip-flop can be resolved. A sequential circuit with two D Flip-Flops (A, B), inputs $x,y$, and output $z$ is defined by: $$\begin{array}{rl}A(t+1)& =x{y}^{\prime }+xB\\ B(t+1)& =x^{\prime }B+xA\\ z& =A\end{array}$$