Microprogramming & Control Unit Design: Sequencers, Control Words & Logic

TAKEAWAYS:

• Microprogramming replaces hardwired logic by storing control signals in control memory as microinstructions, enabling flexibility and easier instruction-set modifications.
• The control word is a bit-pattern that defines all signals (e.g., ALU opcodes, bus enables) needed for a single microoperation, generated via control memory or hardwired PLA.
• A microprogram sequencer (next-address generator) determines the sequence of microinstructions using sequential logic (counter) or conditional branching (based on status flags).
• Hardwired control units use combinational logic (PLA/ROM) for faster execution but lack flexibility; microprogrammed units trade speed for modularity and easier debugging.
• Booth’s algorithm and shift-add multiplication are classic examples where microprogramming simplifies complex arithmetic operations in hardware.
• Modern CPUs (e.g., Intel’s x86) use hybrid control units—microprogrammed for complex instructions and hardwired for simple ones—to balance speed and flexibility.

1. Control Unit: The Brain of the CPU

The Control Unit (CU) is the component that decodes instructions, generates control signals, and coordinates data flow between the CPU, memory, and I/O devices. It acts as the "traffic cop" of the processor, ensuring every operation (e.g., ADD, JMP, MOV) executes in the correct sequence.

How the Control Unit Works

1. Fetch Phase: The CU reads the instruction code from memory (via the Program Counter).
2. Decode Phase: It interprets the opcode to determine the operation (e.g., ADD A,B).
3. Execute Phase: The CU generates control signals (e.g., ALU_add, MemR, BusRq) to activate the correct hardware components.
4. Writeback Phase: Results are stored in registers or memory.

2. Hardwired vs. Microprogrammed Control Units

The two primary designs for implementing the CU differ in speed, flexibility, and complexity. Below is a comparison:

Why Use Microprogramming?

• Easier Design: Same logic handles all instructions.
• Instruction-Set Extensions: Add new instructions by writing new microprograms.
• Debugging: Microinstructions can be stepped through like a program.
• Standardization: Used in VLIW (Very Long Instruction Word) architectures.

Why Use Hardwired?

• Speed: Critical for real-time systems (e.g., DSPs, embedded controllers).
• Lower Power: No extra memory access overhead.

3. Microprogramming: Storing Control Logic in Memory

Microprogramming replaces hardwired logic with a sequence of microinstructions stored in control memory (microprogram memory). Each microinstruction defines a single microoperation (e.g., "load ALU with A", "enable bus").

Key Components of a Microprogrammed CU

1. Control Memory (Microprogram Memory)

   • Stores microinstructions (each 16–64 bits wide).
   • Addressed by the microprogram sequencer.

2. Microinstruction Register (µIR)

   • Holds the current microinstruction’s control word.

3. Microprogram Sequencer

   • Determines the next microinstruction address (sequential or conditional).
   • Can use:
     • Incremental counter (for sequential execution).
     • Conditional branching (based on status flags, e.g., ZF=1).

4. Control Word (Control Signal Vector)

   • A bit-pattern that defines all control signals for a microoperation.
   • Example (for ADD A,B):

     Bit 0-3: ALU opcode (e.g., 0010 = ADD)
     Bit 4:   MemR (read memory)
     Bit 5:   BusRq (request bus)
     Bit 6:   IRW (write to IR)
     ...
     

4. Generating Control Words: Step-by-Step

To generate a control word for an instruction (e.g., MOV A,M), follow these steps:

Example: Control Word for MOV A,M (Load Accumulator from Memory)

1. Operation Breakdown:

   • Read data from memory address in PC → M.
   • Write data to A (Accumulator).
   • Increment PC for next instruction.

2. Microoperations:

   Step	Microoperation	Control Signals Needed
   1	Send PC to address bus	PC→AD, ADSEL (address select)
   2	Read memory (M) → data bus	MemR, DBEN (data bus enable)
   3	Write M to A	A←DB, WR_A (write to A)
   4	Increment PC	PC←PC+1, PCW (write to PC)

3. Control Word Format:

   [ALU_op: 0000] [MemR: 1] [DBEN: 1] [A←DB: 1] [PCW: 1] [PC+1: 1] [ADSEL: 1]
   

   • Binary: 0000 1 1 1 1 1 1 ... (remaining bits = 0).

Mermaid Diagram: Microprogram Flow for MOV A,M

stateDiagram-v2
    [*] --> Fetch_Microaddr: Start
    Fetch_Microaddr --> Send_PC_to_AD: Load PC to address bus
    Send_PC_to_AD --> Enable_MemR: Enable memory read
    Enable_MemR --> Load_A_from_DB: Write DB to A
    Load_A_from_DB --> Increment_PC: PC = PC + 1
    Increment_PC --> [*]: End

5. Microprogram Sequencer: How It Works

The sequencer determines the next microinstruction address using:

1. Sequential Execution (default):

   • Uses a counter that increments after each microinstruction.
   • Example: Address 0000 → 0001 → 0010 → ...

2. Conditional Branching:

   • Checks status flags (e.g., ZF, CF) to decide the next address.
   • Example: If ZF=1, jump to address 0100 (for zero-flag handling).

Mermaid Diagram: Microprogram Sequencer Logic

flowchart TD
    A["Microinstruction Register (µIR)"] --> B["Control Word Decoder"]
    B --> C["Next Address Generator"]
    C -->|"Sequential"| D["µPC ← µPC + 1"]
    C -->|"Conditional"| E["µPC ← Flag-Based Address"]
    D --> F["Control Memory"]
    E --> F
    F --> A

6. Symbolic Microprogram for the FETCH Routine

The FETCH routine is the first step in executing any instruction. Below is a symbolic microprogram for the 8085’s FETCH cycle:

Real-World Example: How Microprogramming Works in Embedded Systems

• eSewa’s Payment Gateway: When you pay a bill via eSewa, the backend server processes your transaction using a microprogrammed control unit in the payment processor. The CU handles:
  1. Fetching your account details from memory.
  2. Decoding the transaction type (e.g., DEBIT, TRANSFER).
  3. Executing microinstructions to update balances and log the transaction.
  • Why microprogramming? eSewa’s system needs to support multiple payment methods (Khalti, bank transfer, etc.). Microprogramming allows easy updates to the instruction set without hardware changes.

7. Booth’s Multiplication Algorithm: A Microprogramming Example

Booth’s algorithm is a shift-add method for multiplying two numbers, often implemented via microprogramming. It reduces the number of additions/subtractions by skipping zeros.

Steps of Booth’s Algorithm

1. Initialize:

   • A = Multiplicand, Q = Multiplier, P = 0, Result = 0.
   • Set Q to the rightmost bit (LSB) of the multiplier.

2. Loop:

   • Check bits Q₀ and Q₋₁:
     • 01: Add A to P, set Q₋₁ = 0.
     • 10: Subtract A from P, set Q₋₁ = 1.
     • 00 or 11: Do nothing.
   • Arithmetic Right Shift: Shift P and Q right by 1 bit.
   • Repeat until all bits are processed.

Microprogrammed Implementation

Each step of Booth’s algorithm can be implemented as a microinstruction:

• Add/Subtract: Control signals for ALU (ADD/SUB).
• Shift: Control signals for barrel shifter.
• Conditional Jumps: Based on Q₀ and Q₋₁.

Mermaid Diagram: Booth’s Algorithm Flow

flowchart TD
    A["Initialize A, Q, P"] --> B["Check Q0, Q-1"]
    B -->|"01"| C["P = P + A"]
    B -->|"10"| D["P = P - A"]
    B -->|"00/11"| E["No Op"]
    C --> F["Set Q-1 = 0"]
    D --> F
    E --> F
    F --> G["Arithmetic Right Shift"]
    G --> H["Loop until done?"]
    H -->|"No"| B
    H -->|"Yes"| I["End"]

Real-World Example: Daraz’s Order Processing When you place an order on Daraz, the backend system uses microprogrammed arithmetic (like Booth’s algorithm) to:

1. Calculate discounts (multiplication of percentages).
2. Update inventory (subtraction of stock).
3. Generate bills (addition of taxes).

• Why? Microprogramming allows Daraz’s servers to efficiently handle thousands of transactions per second with minimal hardware changes.

8. Control Unit Design: Hardwired vs. Microprogrammed Trade-offs

9. Hybrid Control Units: Best of Both Worlds

Modern CPUs (e.g., Intel x86, ARM Cortex) use a hybrid approach:

• Hardwired logic for simple instructions (e.g., MOV, ADD).
• Microprogrammed logic for complex instructions (e.g., FPU operations, MMX).

Example: Intel’s x86 Microcode

• Some x86 instructions (like REP MOVSB) are implemented via microcode stored in the CPU’s ROM.
• This allows Intel to add new instructions (e.g., AVX-512) without changing the hardware design.

10. Practical Example: Designing a Control Word for ADD A,B

Let’s design a control word for the instruction ADD A,B (add register B to A).

Step-by-Step Breakdown

1. Operation: A = A + B.

2. Microoperations:

   • Load A and B into ALU.
   • Perform ADD.
   • Store result back to A.

3. Control Signals Needed:

   Signal	Purpose	Value
   ALU_op	ALU operation code (ADD)	0010
   A→ALU	Load A to ALU input 1	1
   B→ALU	Load B to ALU input 2	1
   ALU→A	Write ALU result to A	1
   MemR	Read from memory (not needed)	0
   IRW	Write to IR (not needed)	0

4. Final Control Word (Binary):

   [ALU_op: 0010] [A→ALU: 1] [B→ALU: 1] [ALU→A: 1] [MemR: 0] [IRW: 0] ...
   

   • Hexadecimal: 0x261 (simplified).

Real-World Example: Ncell’s Billing System Ncell’s billing system uses microprogrammed arithmetic to:

1. Calculate call charges (multiplication of time × rate).
2. Apply discounts (subtraction of promotional amounts).
3. Update user balances (addition/subtraction).

• Why? Microprogramming allows Ncell to update billing algorithms without changing hardware, reducing costs.

In the Real World

1. Khalti’s Payment Processing

   • Idea Used: Microprogrammed control units handle transaction validation.
   • How? When you transfer money via Khalti, the backend server’s CPU uses a microprogrammed CU to:
     • Fetch your account details.
     • Decode the transaction type (DEBIT, TRANSFER).
     • Execute microinstructions to update balances and log the transaction.
   • Why? Microprogramming allows Khalti to support multiple payment methods (bank transfer, mobile wallet) with software updates alone.

2. Pathao’s Ride-Matching Algorithm

   • Idea Used: Control unit logic for priority scheduling.
   • How? Pathao’s servers use a microprogrammed CU to:
     • Fetch rider and driver locations from memory.
     • Decode the matching algorithm (e.g., nearest driver first).
     • Execute microinstructions to update ride statuses and send notifications.
   • Why? Microprogramming enables real-time updates to the matching algorithm without hardware changes.

3. NTC’s Network Traffic Routing

   • Idea Used: Microprogrammed sequencers for packet forwarding.
   • How? NTC’s routers use microprogrammed control units to:
     • Fetch packet headers from memory.
     • Decode routing tables (stored in control memory).
     • Execute microinstructions to forward packets to the correct destination.
   • Why? Microprogramming allows NTC to update routing protocols (e.g., BGP, OSPF) via software patches.

Exam Tip

1. Understand the Difference Between Hardwired and Microprogrammed CUs

   • Hardwired: Faster, inflexible, used in embedded systems.
   • Microprogrammed: Slower, flexible, used in complex CPUs.
   • Exam Trick: Always compare speed, flexibility, and complexity in your answer.

2. Control Word Generation is a Common Question

   • How to Score Full Marks:
     • List all microoperations for the instruction.
     • Map each microoperation to control signals (e.g., ALU_op, MemR).
     • Draw a control word format (bit-field diagram).
   • Example: For SUB B, mention:
     • ALU_op = SUB (e.g., 0101).
     • B→ALU, A→ALU (if A is implicit).
     • ALU→B (store result in B).

3. Microprogram Sequencer Logic

   • Key Points to Mention:
     • Sequential execution (incremental counter).
     • Conditional branching (based on flags like ZF, CF).
     • Next-address generation (e.g., µPC ← µPC + 1 or µPC ← Flag_Address).
   • Exam Tip: Draw a state diagram or flowchart of the sequencer logic.

4. Booth’s Algorithm is Often Asked

   • How to Answer:
     • Explain shift-add method.
     • Show bit-pair checks (01, 10, 00, 11).
     • Mention arithmetic right shift.
   • Real-World Link: Relate to financial calculations (e.g., loan interest in banks).

5. Hybrid Control Units

   • Modern CPUs (e.g., x86) use both hardwired and microprogrammed logic.
   • Exam Tip: Mention that simple instructions (e.g., MOV) are hardwired, while complex ones (e.g., FPU ops) are microprogrammed.

6. Practical Applications

   • Banks (e.g., NMB, Global IME): Use microprogrammed CUs for transaction processing.
   • E-commerce (e.g., Daraz): Use microprogramming for inventory management.
   • Telecom (e.g., Ncell): Use microprogrammed routers for packet forwarding.

Final Advice:

• Draw diagrams for control word formats, sequencer logic, and microprogram flows.
• Relate to real-world systems (e.g., Khalti, Pathao, NTC) to make your answer stand out.
• Memorize Booth’s algorithm—it’s a high-yield topic for both theory and practical questions.