Tribhuvan University
Bachelor of Computer Application
Semester 2 · TU Board 2023
Course Title: Microprocessor and Computer Architecture (CACS155)
Full Marks: 60Pass Marks: 24Time: 3 hours
Candidates are required to answer the question in their own words as far as possible.
Group A
Group B
Attempt any SIX question.(6 × 5 = 30)
- 2.5
Define addressing mode? Suppose content of register A and B is 37H and 57H respectively. Find the content of flag register after ADD B is performed.
- 3.5
What is the requirement of common bus System? Explain with figure.
- 4.5
Explain Symbolic Microinstruction and microinstruction format.
- 5.5
What is stack? Give the organization of register stack with all necessary elements.
- 6.5
What is pipeline conflict? Explain data dependency and handling of branch instruction in detail.
- 7.5
Explain the basic working principle of the Control Unit with timing diagram.
- 8.5
Explain the following instructions a) LHLD 5050H b) CPI 34H c) JNZ 6080H
Group C
Attempt any TWO questions(2 × 10 = 20)
- 9.10
Draw the timing diagram for MOV B. For ten bytes of data starting from 7050H, write a program to sort the reading in ascending order.
- 10.10
Explain the steps of Address Sequencing in detail. Draw and explain selection of address for control memory.
- 11.10
Discuss four-segment instruction pipeline with suitable diagram.
Answer comingAlso asked in 2020, 2019
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