Addressing Modes & Instruction Set: How CPUs Access Data & Execute Commands

Key Concepts: Addressing Modes

Addressing modes determine how the operand (data or address) is specified in an instruction. They affect memory access speed, instruction size, and CPU efficiency. Below are the 7 primary addressing modes (as per TU syllabus), visualized with their memory access patterns.

1. Immediate Addressing

• Definition: The operand is embedded directly in the instruction.
• Format:

  flowchart LR
    A["Instruction"] --> B["Opcode"] --> C["Immediate Data"]

• Example (8086 Assembly):

  MOV AL, 5Ah  ; Loads AL with hex value 5A (90 in decimal)
  

• Advantages:
  • Fastest (no memory access needed).
  • Fixed-size instructions.
• Disadvantages:
  • Limited to small constants (e.g., 8-bit or 16-bit).
  • Cannot modify data dynamically.
• Real-World Use:
  • Khalti’s transaction limits: When setting a fixed max transaction amount (e.g., MOV AX, 50000 for Rs. 50,000), immediate addressing is used for quick comparisons.

2. Register Addressing

• Definition: The operand is stored in a CPU register (e.g., AX, BX, AL).
• Format:

  flowchart LR
    A["Instruction"] --> B["Opcode"] --> C["Register"]

• Example (8086):

  ADD BX, CX  ; Adds contents of CX to BX
  

• Advantages:
  • Extremely fast (register access is ~1 ns vs. ~100 ns for RAM).
  • Reduces memory traffic.
• Disadvantages:
  • Limited by the number of registers (8086 has 8 general-purpose registers).
• Real-World Use:
  • Pathao’s ride-matching algorithm: Registers store temporary variables like distance, fare, and user_id during calculations to speed up processing.

3. Direct Addressing

• Definition: The operand’s memory address is specified directly in the instruction.
• Format:

  flowchart LR
    A["Instruction"] --> B["Opcode"] --> C["Memory Address"]

• Example (8086):

  MOV AL, [2050h]  ; Loads AL with data at memory location 2050h
  

• Advantages:
  • Simple and easy to understand.
• Disadvantages:
  • Fixed address: Cannot be modified at runtime (unlike indirect modes).
  • Instruction size increases (address takes 16/32 bits).
• Real-World Use:
  • NTC’s billing system: Direct addressing accesses fixed memory locations storing customer IDs and usage data (e.g., MOV AX, [CUSTOMER_1001]).

4. Indirect Addressing

• Definition: The operand’s address is stored in a register or memory location.
• Types:
  1. Register Indirect: Address is in a register (e.g., [BX]).
  2. Memory Indirect: Address is stored in memory (e.g., [2050h] contains the address).
• Format (Register Indirect):

  flowchart LR
    A["Instruction"] --> B["Opcode"] --> C["Register"] --> D["Memory Address"] --> E["Data"]

• Example (8086):

  MOV AL, [BX]  ; Loads AL with data at address stored in BX
  

• Advantages:
  • Flexible: Can access any memory location dynamically.
  • Used in data structures (arrays, linked lists).
• Disadvantages:
  • Slower (requires extra memory access to fetch the address).
• Real-World Use:
  • Daraz’s order queue: Indirect addressing helps access variable-length order records stored in memory (e.g., [ORDER_POINTER] holds the next order’s address).

5. Indexed Addressing

• Definition: The effective address is calculated as: Base Register + Index Register + Displacement. Used for array traversal and looping.
• Format (8086):

  flowchart LR
    A["Instruction"] --> B["Opcode"] --> C["Base (BX/SI)"] --> D["Index (SI/DI)"] --> E["Displacement"] --> F["Effective Address"]

• Example (8086):

  MOV AL, [BX + SI + 5]  ; BX=base, SI=index, 5=displacement
  

• Advantages:
  • Efficient for arrays/lists (e.g., iterating through a customer database).
• Disadvantages:
  • Complex address calculation increases CPU load.
• Real-World Use:
  • NEPSE stock price updates: Indexed addressing helps fetch stock prices from an array where BX = stock ID and SI = time index (e.g., [BX + SI * 4] for 4-byte price data).

6. Relative Addressing

• Definition: Used in jumps and loops. The operand is an offset from the next instruction’s address.
• Format:

  flowchart LR
    A["Instruction"] --> B["Opcode"] --> C["Offset"] --> D["PC + Offset"]

• Example (8086):

  JMP NEXT_STEP  ; Jumps to NEXT_STEP (offset calculated from PC)
  

• Advantages:
  • Position-independent code (useful in shared libraries).
  • Small instruction size (offset is often 8-bit).
• Disadvantages:
  • Limited range (e.g., ±128 bytes in 8086).
• Real-World Use:
  • WhatsApp’s message loop: Relative jumps (JMP) navigate between steps in message encryption/decryption routines.

7. Implicit Addressing

• Definition: The operand is implied by the opcode (no explicit address specified).
• Example (8086):

  INC CX  ; CX is implicitly the operand
  

• Advantages:
  • Shortest instructions (saves space).
• Disadvantages:
  • Limited flexibility (only works with predefined operands).
• Real-World Use:
  • Google’s page-rank algorithm: Implicit operations (e.g., INC COUNT) increment counters without specifying memory addresses.

Instruction Set Basics

The instruction set is the collection of all instructions a microprocessor can execute. It defines:

1. Instruction Format: How opcodes and operands are encoded.
2. Instruction Types: Data transfer, arithmetic, logic, control flow, etc.
3. Instruction Length: Fixed vs. variable (e.g., 8086 has 1–6 byte instructions).

Instruction Format (8086 Example)

• Opcode: Defines the operation (e.g., MOV, ADD).
• ModR/M Byte: Specifies registers/modes (e.g., [BX + SI]).
• Displacement: Offset for indexed addressing.
• Immediate Data: For immediate addressing.

Instruction Types

Worked Example: Loan Interest Calculation (Banking)

Scenario: A bank uses an 8086-based system to calculate simple interest: $$\text{Interest}=P\times R\times T$$ Where:

• $P$ = Principal (stored in memory at [PRINCIPAL]),
• $R$ = Rate (stored in [RATE]),
• $T$ = Time (stored in [TIME]).

Assembly Code:

MOV AX, [PRINCIPAL]  ; Direct addressing: Load principal
MOV BX, [RATE]       ; Direct addressing: Load rate
MUL BX               ; Multiply AX by BX (AX = P * R)
MOV CX, [TIME]       ; Direct addressing: Load time
MUL CX               ; Multiply AX by CX (AX = P * R * T)
MOV [INTEREST], AX   ; Store result

Memory Trace:

Optimization:

• Use registers for intermediate results (e.g., store P*R in DX).
• Replace MUL with IMUL for signed numbers.

Performance Comparison of Addressing Modes

In the Real World

1. Khalti’s Transaction Processing:

   • Immediate addressing sets fixed limits (e.g., MOV AX, 50000 for max transaction).
   • Register addressing stores temporary values like amount, fee, and user_id during calculations.
   • Indirect addressing accesses variable-length transaction records in memory.

2. Pathao’s Ride-Matching Algorithm:

   • Indexed addressing ([BX + SI]) traverses arrays of driver locations to find the nearest match.
   • Relative jumps (JMP) navigate between steps in fare calculation and route optimization.

3. NTC’s Billing System:

   • Direct addressing fetches pre-defined customer data (e.g., MOV AL, [CUSTOMER_1234]).
   • Arithmetic instructions (ADD, SUB) compute usage charges based on time and tariff.

4. NEPSE Stock Ticker:

   • String instructions (MOVSB) process real-time stock price updates.
   • Control flow (LOOP) iterates through all listed companies.

5. Bank Loan Systems:

   • Multiplication/division (MUL, DIV) calculates EMI (Equated Monthly Installment) using formulas like: $$\text{EMI}=P\times \frac{r(1+r{)}^n}{(1+r{)}^n-1}$$
   • Registers store intermediate results (e.g., AX = P, BX = r, CX = n).

Exam Tip

1. Memorize the 7 addressing modes and their memory access patterns. Exams often ask to identify the mode from an instruction (e.g., MOV AL, [BX + SI] is indexed).
2. Trace memory access: For questions like “Show the memory operations for ADD [BX], CX”, draw a diagram with:
   • CPU fetching the instruction.
   • CPU reading [BX] to get the source operand.
   • CPU adding CX to the source.
   • CPU writing back to [BX].
3. Compare modes: Questions may ask “Which mode is faster for accessing an array?” → Indexed (vs. direct).
4. Real-world mapping: Relate instructions to scenarios like:
   • “How would you implement a shopping cart total in Daraz using assembly?” → Use ADD in a loop with indexed addressing.
5. Instruction format: Know that 8086 opcodes are 1–2 bytes, and ModR/M byte is used for complex addressing (e.g., [BX + SI + 10]).
6. Common pitfalls:
   • Confusing direct (MOV AL, [2050h]) vs. indirect (MOV AL, [BX]).
   • Forgetting that immediate data is part of the instruction (not fetched from memory).
   • Misusing relative addressing for non-jump operations.

Final Visual Summary:

mindmap
  root((Addressing Modes))
    Immediate
      "Data in instruction"
      "Fastest"
      "Limited to constants"
    Register
      "Operand in CPU register"
      "Fastest after immediate"
      "Limited by register count"
    Direct
      "Memory address in instruction"
      "Fixed location"
      "Slow due to large instructions"
    Indirect
      "Address stored in register/memory"
      "Dynamic access"
      "Used in data structures"
    Indexed
      "Base + Index + Displacement"
      "Arrays/lists"
      "Complex but flexible"
    Relative
      "Offset from PC"
      "Jumps/loops"
      "Position-independent"
    Implicit
      "Operand implied by opcode"
      "Shortest instructions"
      "Limited use cases"