Elective Digital Logic

Digital LogicUnit 513 min read

Multiplexers, Demuxes, Encoders & Decoders: Design & Applications

Unit 5 of Digital Logic covers multiplexers (MUX), demultiplexers (DEMUX), encoders, and decoders—their logic, design, and real-world applications in data routing, priority handling, and code conversion. Learn truth tables, circuit diagrams, and how they integrate into larger systems like memory addressing and traffic

TAKEAWAYS:

  • Multiplexers select one of n inputs to a single output based on m select lines (e.g., 4:1 MUX uses 2 select lines).
  • Demultiplexers do the reverse: take one input and route it to one of n outputs (e.g., 1:4 DEMUX uses 2 select lines).
  • Encoders convert n active inputs into a unique m-bit code (e.g., 8:3 priority encoder for interrupt handling).
  • Decoders convert m-bit codes back to n active outputs (e.g., 3:8 decoder for memory chip selection).
  • Priority encoders resolve conflicts by giving higher-priority inputs precedence (used in CPU interrupt systems).
  • BCD-to-7-segment decoders drive LED displays (e.g., in digital clocks or calculators).

1. Multiplexers (MUX): The Digital "Switchboard"

A multiplexer (MUX) is a combinational circuit that selects one of n inputs and routes it to a single output based on m select lines. It’s like a digital switchboard that picks the right call (input) to send to the operator (output).

How It Works

  • Inputs: Data inputs (D0, D1, ..., Dn-1).
  • Select Lines: Control which input is passed (S0, S1, ..., Sm-1).
  • Output: The selected input (Y).
  • Formula: , where is the minterm for the select lines.

Example: 4:1 MUX

D0D1D2D3S1S0
4:1 MUX logic gate implementation (S1S0 selects D0–D3)

Truth Table:

S1 S0 Y (Output)
0 0 D0
0 1 D1
1 0 D2
1 1 D3

Real-World Use: eSewa Payment Routing

eSewa uses multiplexers to route payment requests from different banks (inputs) to the correct processing unit (output) based on the bank’s ID (select lines). For example:

  • If S1S0 = 01 (Nabil Bank), the transaction goes to Nabil’s server.
  • If S1S0 = 10 (Global IME), it routes to Global IME’s processor.


2. Demultiplexers (DEMUX): The Digital "Broadcast"

A demultiplexer (DEMUX) does the opposite of a MUX: it takes one input and routes it to one of n outputs based on select lines. Think of it as a digital broadcast tower sending a signal to one of many receivers.

How It Works

  • Input: Single data line (D).
  • Select Lines: Determine which output gets the input (S0, S1, ..., Sm-1).
  • Outputs: Y0, Y1, ..., Yn-1 (only one is active at a time).

Example: 1:4 DEMUX

Y0Y1Y2Y3DS1S0
1:4 DEMUX logic gate implementation (S1S0 routes D to Y0–Y3)

Truth Table:

S1 S0 Y0 Y1 Y2 Y3
0 0 D 0 0 0
0 1 0 D 0 0
1 0 0 0 D 0
1 1 0 0 0 D

Real-World Use: Daraz Order Fulfillment

Daraz uses demultiplexers to route an order confirmation (input) to the correct warehouse (output) based on the product’s location code (select lines). For example:

  • If S1S0 = 10 (Kathmandu warehouse), the order goes there.
  • If S1S0 = 01 (Pokhara warehouse), it’s sent there.


3. Encoders: Converting Signals to Codes

An encoder converts n active inputs into a unique m-bit binary code. It’s like a digital translator that assigns a code to each input signal.

Types of Encoders

  1. Simple Encoder: Only one input is active at a time (no priority).
    • Example: 8:3 encoder (8 inputs → 3-bit output).
  2. Priority Encoder: Resolves conflicts by giving higher-priority inputs precedence (used in CPU interrupts).

Example: 4:2 Priority Encoder

Y1Y0D3D2D1D0Valid
4:2 Priority Encoder logic (highest valid input wins)

Truth Table:

D3 D2 D1 D0 Y1 Y0 Valid
1 x x x 1 1 1
0 1 x x 1 0 1
0 0 1 x 0 1 1
0 0 0 1 0 0 1
0 0 0 0 x x 0

Real-World Use: Ncell Interrupt Handling

Ncell’s base stations use priority encoders to handle multiple incoming calls. If two calls arrive simultaneously:

  • The call from a higher-priority subscriber (e.g., VIP customer) is processed first.
  • The encoder assigns a unique code to the highest-priority active input.


4. Decoders: Converting Codes to Signals

A decoder converts m-bit binary codes into n active outputs. It’s like a digital dictionary that translates codes into actions.

How It Works

  • Inputs: m select lines (S0, S1, ..., Sm-1).
  • Outputs: n lines (Y0, Y1, ..., Yn-1), where only one is active for a given input code.
  • Formula: (only one minterm is 1).

Example: 3:8 Decoder

Y0Y1Y2Y3Y4Y5S2S1S0
3:8 Decoder logic (S2S1S0 activates one of 8 outputs)

Truth Table:

S2 S1 S0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
... ... ... ... ... ... ... ... ... ... ...
1 1 1 0 0 0 0 0 0 0 1

Real-World Use: Memory Chip Addressing

Computers use 3:8 decoders to select specific memory chips. For example:

  • If the CPU sends S2S1S0 = 101, the decoder activates Y5, enabling the memory chip at address 5.
  • This is how RAM modules are addressed in systems.

Special Case: BCD-to-7-Segment Decoder

Used in digital clocks and calculators to display numbers. For example:

  • Input 0110 (6) lights up segments a, c, f, g, d to display the digit 6.
abcdefDCBA
BCD-to-7-segment decoder truth table implementation


5. Comparison Table: MUX vs. DEMUX vs. Encoder vs. Decoder

Feature Multiplexer (MUX) Demultiplexer (DEMUX) Encoder Decoder
Purpose Selects 1 input → 1 output 1 input → Selects 1 output n inputs → m-bit code m-bit code → n outputs
Data Flow Many-to-1 1-to-many Many-to-few Few-to-many
Select Lines Control input selection Control output selection No select lines Yes (input code)
Example IC 74LS151 (8:1 MUX) 74LS138 (3:8 DEMUX) 74LS148 (8:3 Encoder) 74LS138 (3:8 Decoder)
Application Data routing (eSewa) Order routing (Daraz) Interrupt handling (Ncell) Memory addressing (RAM)

6. Worked Example: Design a 4:1 MUX Using Logic Gates

Problem: Implement a 4:1 MUX with inputs D0, D1, D2, D3 and select lines S1, S0.

Solution

  1. Truth Table:

    S1 S0 Y
    0 0 D0
    0 1 D1
    1 0 D2
    1 1 D3
  2. Boolean Expression:

  3. Circuit Diagram:

    flowchart LR
        A["D0"] --> B["AND"]
        C["D1"] --> D["AND"]
        E["D2"] --> F["AND"]
        G["D3"] --> H["AND"]
        I["S1'"] --> B
        I --> D
        J["S0'"] --> B
        J --> F
        K["S1"] --> D
        K --> H
        L["S0"] --> F
        L --> H
        B --> M["OR"]
        D --> M
        F --> M
        H --> M
        M --> N["Y"]
  4. Simplified Using MUX IC: Use a 74LS153 (dual 4:1 MUX) IC to implement this directly.


7. Worked Example: Design a 3:8 Decoder with Enable

Problem: Implement a 3:8 decoder with an active-low enable (E).

Solution

  1. Truth Table:

    E S2 S1 S0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
    1 x x x 0 0 0 0 0 0 0 0
    0 0 0 0 1 0 0 0 0 0 0 0
    0 0 0 1 0 1 0 0 0 0 0 0
    ... ... ... ... ... ... ... ... ... ... ... ...
  2. Boolean Expression for Y0:

  3. Circuit Diagram:

Y0Y1Y2Y3Y4Y5E'S2S1S0
3:8 Decoder with Enable (E' enables all outputs)
  1. Simplified Using Decoder IC: Use a 74LS138 (3:8 decoder with enable) IC.

In the Real World

  1. eSewa Payment Routing

    • What it uses: Multiplexers to route transactions from different banks (inputs) to the correct processing unit (output) based on bank ID (select lines).
    • How: The system checks the bank’s code (e.g., S1S0 = 01 for Nabil Bank) and forwards the payment request to the corresponding server.
  2. Daraz Order Fulfillment

    • What it uses: Demultiplexers to route order confirmations to the correct warehouse.
    • How: The order’s location code (e.g., S1S0 = 10 for Kathmandu) activates the corresponding warehouse’s output line.
  3. Ncell Base Station Interrupts

    • What it uses: Priority Encoders to handle multiple incoming calls.
    • How: If calls arrive from multiple subscribers, the encoder prioritizes VIP customers (higher input priority) and assigns a unique code to the highest-priority call.
  4. Digital Clocks (e.g., Casio)

    • What it uses: BCD-to-7-segment Decoders to display numbers.
    • How: The BCD input (e.g., 0110 for 6) is decoded to light up the correct LED segments (a, c, f, g, d).
  5. Computer Memory (RAM)

    • What it uses: Decoders to select specific memory chips.
    • How: The CPU sends an address (e.g., S2S1S0 = 101), and the decoder activates Y5, enabling the memory chip at address 5.

Exam Tip

  1. Understand the Difference:

    • MUX: Many inputs → 1 output (select input).
    • DEMUX: 1 input → Many outputs (select output).
    • Encoder: Many inputs → Few outputs (convert signals to codes).
    • Decoder: Few inputs → Many outputs (convert codes to signals).
  2. Priority Encoder Trick:

    • In exams, if asked to design a priority encoder, always prioritize the highest input (e.g., D3 has highest priority in a 4:2 encoder).
  3. IC Usage:

    • Memorize common ICs:
      • MUX: 74LS151 (8:1), 74LS153 (dual 4:1).
      • DEMUX: 74LS138 (3:8).
      • Encoder: 74LS148 (8:3 priority).
      • Decoder: 74LS138 (3:8), 74LS47 (BCD-to-7-segment).
  4. Truth Tables Are Key:

    • For any design question, start with the truth table. This is what examiners check first.
  5. Real-World Applications:

    • Expect questions linking these circuits to payment systems (eSewa), order routing (Daraz), or memory addressing (RAM). Always relate your answer to a real scenario.

Final Note:

  • Practice drawing circuits for MUX, DEMUX, and decoders from truth tables.
  • Memorize the IC pinouts (e.g., 74LS138 has an active-low enable).
  • Use K-maps if simplifying complex MUX/DEMUX expressions (though most are straightforward).

Based on the PU BE Computer (PU) syllabus for Digital Logic, unit 5.

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