Shift Registers, Counters & Memory: Design, Timing & Applications

TAKEAWAYS:

• Shift registers move data serially/parallel using clock pulses, critical for serial communication (e.g., UART) and data buffering.
• Counters (modular, synchronous/asynchronous) count events or generate clock pulses; asynchronous counters use ripple delays, while synchronous avoid glitches.
• Memory units (RAM/ROM) store data temporarily/permanently; RAM is volatile but fast, while ROM is non-volatile but slower.
• Design steps: State diagram → excitation table → flip-flop circuit → timing diagram → verification.
• Exam focus: Counter/modulo design, shift register configurations, and memory unit comparisons (speed, volatility, cost).

1. Shift Registers: Serial Data Movement

Shift registers store and transfer binary data bit-by-bit using clock pulses. They are classified by direction (serial-in/serial-out, serial-in/parallel-out, parallel-in/serial-out, parallel-in/parallel-out) and operation (shift-left/right).

How They Work

• Clock pulse: Shifts data from one flip-flop to the next.
• Serial input: Data enters one bit at a time.
• Parallel output: Data exits all bits simultaneously (e.g., for display).

Types of Shift Registers

graph LR
    A["Shift Registers"] --> B["Serial-In Serial-Out (SISO)"]
    A --> C["Serial-In Parallel-Out (SIPO)"]
    A --> D["Parallel-In Serial-Out (PISO)"]
    A --> E["Parallel-In Parallel-Out (PIPO)"]
    B -->|"Used in"| F["Data buffering"]
    C -->|"Used in"| G["Display drivers"]
    D -->|"Used in"| H["Serial communication"]
    E -->|"Used in"| I["Fast data transfer"]

Example: 4-bit Serial-In Parallel-Out (SIPO) Shift Register

Circuit:

Truth Table:

Application:

• eSewa transaction logs: Shift registers store sequential transaction IDs before displaying them in parallel on a screen.

2. Counters: Counting Events or Generating Pulses

Counters increment or decrement binary numbers on clock pulses. They are classified by:

• Modulo (MOD): Number of unique states (e.g., MOD-10 for decimal counting).
• Synchronization: Synchronous (all flip-flops triggered simultaneously) vs. asynchronous (ripple carry).

Types of Counters

Example: MOD-10 Asynchronous Counter (Using JK Flip-Flops)

State Diagram:

Design Steps:

1. State Table: List all 10 states (0000 to 1001).

2. Excitation Table: Determine J/K inputs for each flip-flop to transition between states.

   Present State	Next State	J3	K3	J2	K2	J1	K1	J0	K0
   0000	0001	0	X	0	X	0	X	1	X
   0001	0010	0	X	1	X	1	X	1	X
   ...	...	...	...	...	...	...	...	...	...
   1001	0000	1	1	1	1	1	1	1	1

3. Circuit:

4. Timing Diagram:

Real-World Tie-In:

• NTC Electricity Meter: Uses a MOD-10 counter to display the last digit of consumed units (0–9). The ripple delay causes a slight lag when switching from 9 to 0.

3. Memory Units: RAM vs. ROM

Memory units store data temporarily (RAM) or permanently (ROM). Key differences:

RAM Types

1. SRAM (Static RAM): Uses flip-flops; faster but expensive.
2. DRAM (Dynamic RAM): Uses capacitors; slower but cheaper (used in PCs).

ROM Types

1. PROM: Programmable once.
2. EPROM: Erasable with UV light.
3. EEPROM: Electrically erasable.
4. Flash Memory: Used in USB drives, SSDs.

Example: 4x4 SRAM Cell

```figure
{"type":"circuit","inputs":["D","CLK","WE"],"gates":[{"id":"inv1","type":"NOT","in":["D"],"out":"D'"},{"id":"inv2","type":"NOT","in":["D'"],"out":"D"}],"flipflops":[{"id":"f0","type":"SR","in":{"S":"inv1","R":"inv2","CLK":"CLK"}},{"id":"f1","type":"SR","in":{"S":"inv2","R":"inv1","CLK":"CLK"}}],"transistors":[{"id":"t1","type":"NMOS","in":["WE","f0.Q"],"out":"D_out"},{"id":"t2","type":"NMOS","in":["WE","f1.Q"],"out":"D'_out"}],"outputs":[{"name":"D_out","from":"t1"},{"name":"D'_out","from":"t2"}],"caption":"4x4 SRAM Cell: Two cross-coupled inverters with access transistors (simplified)"}

Operation:

• Read: Enable word line → pass transistor conducts → data read from latch.
• Write: Enable word line + bit line → overwrite latch data.

Real-World Tie-In:

• Khalti Payment App: Uses SRAM for temporary transaction data (e.g., OTP storage) and Flash Memory for permanent user profiles.

4. Advanced Topics: Ring and Johnson Counters

Ring Counter

• Definition: Circular shift of a single 1 through flip-flops.
• MOD-N: Requires N flip-flops for N states.
• Example: 3-bit ring counter (MOD-3) for traffic light sequencing (red → yellow → green).

Circuit:

State Sequence:

Johnson Counter

• Definition: Modified ring counter with inverted feedback (toggle on 0).
• MOD-2N: 2N states for N flip-flops (e.g., 4-bit Johnson counter has MOD-8).

Example: 4-bit Johnson Counter State Sequence:

Application:

• Pathao Ride Sequencer: Uses a Johnson counter to cycle through ride statuses (waiting → assigned → in-progress → completed).

## In the Real World

1. eSewa Transaction Processing:

   • Shift Registers: Store sequential transaction IDs before displaying them in parallel on the user’s screen.
   • Counters: MOD-10 counters validate the last digit of transaction amounts (e.g., 12345 → last digit 5).

2. Ncell Prepaid Top-Up:

   • Ring Counter: Sequences through menu options (balance check → top-up → recharge history).
   • RAM: Temporarily stores the last 5 digits of the phone number during input.

3. Daraz Order Fulfillment:

   • Johnson Counter: Generates unique order IDs in a predictable sequence (e.g., ORD-0001 to ORD-0008 for 3-bit counter).
   • SRAM: Buffers order details (product ID, quantity) during processing.

## Exam Tip

1. Counter Design:

   • Always start with the state diagram → excitation table → flip-flop circuit.
   • For asynchronous counters, show ripple delay in the timing diagram.
   • For synchronous counters, use AND/OR gates to generate control signals.

2. Shift Registers:

   • Memorize the 4 configurations (SISO, SIPO, PISO, PIPO) and their uses.
   • In exams, if asked to design a shift register, specify clock polarity (active high/low) and data loading method (positive/negative edge).

3. Memory Units:

   • Compare RAM vs. ROM in terms of volatility, speed, and cost.
   • For SRAM/DRAM, explain the transistor/capacitor-based storage mechanism.

4. Short Notes:

   • Ring Counter: Emphasize its MOD-N property and single 1 circulation.
   • Johnson Counter: Highlight its MOD-2N property and non-returning sequence.
   • RAM: Focus on SRAM (flip-flops) vs. DRAM (capacitors).

5. Common Pitfalls:

   • Forgetting to reset the counter after reaching MOD-N (e.g., MOD-10 counter must return to 0000 after 1001).
   • Misaligning JK flip-flop inputs in the excitation table (e.g., J=K=1 for toggle).
   • Ignoring don’t care conditions in memory design (e.g., unused states in a counter).

Visual Summary: