Tribhuvan University
Bachelor of Science in Computer Science and Information Technology
Semester 1 · TU Board 2074
Course Title: Digital Logic (CSC116)
Full Marks: 60Pass Marks: 24Time: 3 hours
Candidates are required to give their answers in their own words as far as practicable. The figures in the margin indicate full marks.
Group A
(2 × 10 = 20)
- 1.10
Implement the following Functions F= Σ (0,3,5,6,7) using
- Decoder
- Multiplexer
- PLA
Answer comingAlso asked in 2080, 2078, 2077, 2075
- 2.10
Differentiate between PAL and PLA. Design a counter as shown in the state diagram below
[figure in the original paper]
- 3.10
Draw a block diagram, truth table and logic circuit of 1*16 Demultiplexer and explain its working principle.
Group B
(8 × 5 = 40)
- 4.5
Perform the arithmetic operation (+42)+(-13) and (-42)-(-13) in binary using the signed -2's-complement representation for negative numbers.
- 5.5
Express the complement of the following function in sum of min-terms.
F(A, B, C, D) = Σ(0, 2, 6, 11, 13, 14)
Answer comingAlso asked in 2078, 2075
- 6.5
Reduce the following function using k-map F = wxy + yz + xy'z + x'y
Answer comingAlso asked in 2075
- 7.5
Design a combinational circuit with three inputs and six outputs. The output binary number should be the square of the input binary number.
Answer comingAlso asked in 2081, 2078, 2075
- 8.5
Design a 5 x 32 decoder with four 3 x 8 decoder with enable and one 2 x 4 decoder. Use block diagrams only.
- 9.5
Design and explain the Decimal adder with truth table and suitable diagram.
- 10.5
Explain shift register with parallel load. Highlight on its practical implications.
- 11.5
Explain master slave J-K flipflop.
- 12.5
Write short notes on (any two):
- State diagram
- De-Morgan's theorem
- TTL
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