Digital Logic TU Board 2077 question paper

Design a combinational circuit that generates 9's complement of a BCD number.

Implement the following functions using PLA

1. w (A, B, C, D) = Σ(2, 12, 13)
2. x (A, B, C, D) = Σ(7, 8, 9, 10, 11, 12, 13, 14, 15)
3. y (A, B, C, D) = Σ(0, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 15)
4. z (A, B, C, D) = Σ(1, 2, 8, 12, 13)

Design sequential circuit specified by the following state diagram using T flip-flops.

[figure in the original paper]

List two major characteristics of digital computer. Represent -6 (negative six) 8 bits in signed magnitude, signed 1's complement and signed 2's complement respectively. Represent decimal number 4673 in a) octal and b) BCD

Where is CMOS suitable to use? Define Power dissipation. Show that the positive logic NAND gate is a negative logic NOR gate and vice versa.

Simplify the following function and implement them with two level NOR gate circuit, F(w, x, y, z) = wx' + y'z' + w'yz'.

Design a full subtractor circuit with three inputs x, y, $B_{in}$ and two outputs Diff and $B_{out}$· The circuit subtracts $x-y-B_{in}$., where $B_{in}$ is the input borrow, $B_{out}$ is the output borrow, and Diff is the difference.

Design 4-bit even parity generator.

What is the difference between a serial and parallel transfer? Explain how to convert serial data to parallel and parallel data to serial. What type of register is needed?

Explain negative-edge triggered D flip flop with necessary logic diagram and truth table.

Illustrate the use of Binary ripple counter and BCD ripple counter.

Write Short notes on (Any two)

1. RTL
2. State Reduction
3. POS